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LoongArch changes for v6.10

Browse Source 
1, Select some options in Kconfig;
 2, Give a chance to build with !CONFIG_SMP;
 3, Switch to use built-in rustc target;
 4, Add new supported device nodes to dts;
 5, Some bug fixes and other small changes;
 6, Update the default config file.
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Merge tag 'loongarch-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch updates from Huacai Chen:

 - Select some options in Kconfig

 - Give a chance to build with !CONFIG_SMP

 - Switch to use built-in rustc target

 - Add new supported device nodes to dts

 - Some bug fixes and other small changes

 - Update the default config file

* tag 'loongarch-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  LoongArch: Update Loongson-3 default config file
  LoongArch: dts: Add new supported device nodes to Loongson-2K2000
  LoongArch: dts: Add new supported device nodes to Loongson-2K0500
  LoongArch: dts: Remove "disabled" state of clock controller node
  LoongArch: rust: Switch to use built-in rustc target
  LoongArch: Fix callchain parse error with kernel tracepoint events again
  LoongArch: Give a chance to build with !CONFIG_SMP
  LoongArch: Select THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
  LoongArch: Select ARCH_WANT_DEFAULT_BPF_JIT
  LoongArch: Select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
  LoongArch: Select ARCH_HAS_FAST_MULTIPLIER
This commit is contained in:
Linus Torvalds 2024-05-22 09:43:07 -07:00
commit 4f05e82003
19 changed files with 243 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/loongarch/Kconfig
View File

@ -16,6 +16,7 @@ config LOONGARCH
select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
select ARCH_HAS_CPU_FINALIZE_INIT
select ARCH_HAS_CURRENT_STACK_POINTER
select ARCH_HAS_FAST_MULTIPLIER
select ARCH_HAS_FORTIFY_SOURCE
select ARCH_HAS_KCOV
select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
@ -56,6 +57,7 @@ config LOONGARCH
select ARCH_SUPPORTS_ACPI
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_HUGETLBFS
select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
select ARCH_SUPPORTS_LTO_CLANG
select ARCH_SUPPORTS_LTO_CLANG_THIN
select ARCH_SUPPORTS_NUMA_BALANCING
@ -63,10 +65,12 @@ config LOONGARCH
select ARCH_USE_CMPXCHG_LOCKREF
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
select ARCH_WANT_DEFAULT_BPF_JIT
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
select ARCH_WANT_LD_ORPHAN_WARN
select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
select ARCH_WANTS_NO_INSTR
select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
select BUILDTIME_TABLE_SORT
select COMMON_CLK
select CPU_PM
@ -174,7 +178,6 @@ config LOONGARCH
select PCI_QUIRKS
select PERF_USE_VMALLOC
select RTC_LIB
select SMP
select SPARSE_IRQ
select SYSCTL_ARCH_UNALIGN_ALLOW
select SYSCTL_ARCH_UNALIGN_NO_WARN
@ -420,6 +423,7 @@ config EFI_STUB
config SCHED_SMT
bool "SMT scheduler support"
depends on SMP
default y
help
Improves scheduler's performance when there are multiple

2
arch/loongarch/Makefile
View File

@ -101,7 +101,7 @@ ifdef CONFIG_OBJTOOL
KBUILD_CFLAGS += -fno-jump-tables
endif
KBUILD_RUSTFLAGS += --target=$(objtree)/scripts/target.json
KBUILD_RUSTFLAGS += --target=loongarch64-unknown-none-softfloat
KBUILD_RUSTFLAGS_MODULE += -Crelocation-model=pic
ifeq ($(CONFIG_RELOCATABLE),y)

86
arch/loongarch/boot/dts/loongson-2k0500.dtsi
View File

@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/loongson,ls2k-clk.h>
/ {
#address-cells = <2>;
@ -19,14 +20,15 @@ cpu0: cpu@0 {
compatible = "loongson,la264";
device_type = "cpu";
reg = <0x0>;
clocks = <&cpu_clk>;
clocks = <&clk LOONGSON2_NODE_CLK>;
};
};
cpu_clk: cpu-clk {
ref_100m: clock-ref-100m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <500000000>;
clock-frequency = <100000000>;
clock-output-names = "ref_100m";
};
cpuintc: interrupt-controller {
@ -35,6 +37,28 @@ cpuintc: interrupt-controller {
interrupt-controller;
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tsensor 0>;
trips {
cpu-alert {
temperature = <33000>;
hysteresis = <2000>;
type = "active";
};
cpu-crit {
temperature = <85000>;
hysteresis = <5000>;
type = "critical";
};
};
};
};
bus@10000000 {
compatible = "simple-bus";
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
@ -52,6 +76,54 @@ isa@16400000 {
ranges = <1 0x0 0x0 0x16400000 0x4000>;
};
clk: clock-controller@1fe10400 {
compatible = "loongson,ls2k0500-clk";
reg = <0x0 0x1fe10400 0x0 0x2c>;
#clock-cells = <1>;
clocks = <&ref_100m>;
clock-names = "ref_100m";
};
dma-controller@1fe10c00 {
compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
reg = <0 0x1fe10c00 0 0x8>;
interrupt-parent = <&eiointc>;
interrupts = <67>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
dma-controller@1fe10c10 {
compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
reg = <0 0x1fe10c10 0 0x8>;
interrupt-parent = <&eiointc>;
interrupts = <68>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
dma-controller@1fe10c20 {
compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
reg = <0 0x1fe10c20 0 0x8>;
interrupt-parent = <&eiointc>;
interrupts = <69>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
dma-controller@1fe10c30 {
compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
reg = <0 0x1fe10c30 0 0x8>;
interrupt-parent = <&eiointc>;
interrupts = <70>;
clocks = <&clk LOONGSON2_APB_CLK>;
#dma-cells = <1>;
status = "disabled";
};
liointc0: interrupt-controller@1fe11400 {
compatible = "loongson,liointc-2.0";
reg = <0x0 0x1fe11400 0x0 0x40>,
@ -139,6 +211,14 @@ ohci0: usb@1f058000 {
status = "disabled";
};
tsensor: thermal-sensor@1fe11500 {
compatible = "loongson,ls2k0500-thermal", "loongson,ls2k1000-thermal";
reg = <0x0 0x1fe11500 0x0 0x30>;
interrupt-parent = <&liointc0>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <1>;
};
uart0: serial@1ff40800 {
compatible = "ns16550a";
reg = <0x0 0x1ff40800 0x0 0x10>;

4
arch/loongarch/boot/dts/loongson-2k1000-ref.dts
View File

@ -113,10 +113,6 @@ &uart0 {
status = "okay";
};
&clk {
status = "okay";
};
&rtc0 {
status = "okay";
};

1
arch/loongarch/boot/dts/loongson-2k1000.dtsi
View File

@ -159,7 +159,6 @@ clk: clock-controller@1fe00480 {
#clock-cells = <1>;
clocks = <&ref_100m>;
clock-names = "ref_100m";
status = "disabled";
};
gpio0: gpio@1fe00500 {

49
arch/loongarch/boot/dts/loongson-2k2000.dtsi
View File

@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/loongson,ls2k-clk.h>
/ {
#address-cells = <2>;
@ -19,21 +20,22 @@ cpu0: cpu@1 {
compatible = "loongson,la364";
device_type = "cpu";
reg = <0x0>;
clocks = <&cpu_clk>;
clocks = <&clk LOONGSON2_NODE_CLK>;
};
cpu1: cpu@2 {
compatible = "loongson,la364";
device_type = "cpu";
reg = <0x1>;
clocks = <&cpu_clk>;
clocks = <&clk LOONGSON2_NODE_CLK>;
};
};
cpu_clk: cpu-clk {
ref_100m: clock-ref-100m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1400000000>;
clock-frequency = <100000000>;
clock-output-names = "ref_100m";
};
cpuintc: interrupt-controller {
@ -42,6 +44,28 @@ cpuintc: interrupt-controller {
interrupt-controller;
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tsensor 0>;
trips {
cpu-alert {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
cpu-crit {
temperature = <85000>;
hysteresis = <5000>;
type = "critical";
};
};
};
};
bus@10000000 {
compatible = "simple-bus";
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
@ -58,6 +82,14 @@ isa@18400000 {
ranges = <1 0x0 0x0 0x18400000 0x4000>;
};
clk: clock-controller@10010480 {
compatible = "loongson,ls2k2000-clk";
reg = <0x0 0x10010480 0x0 0x100>;
#clock-cells = <1>;
clocks = <&ref_100m>;
clock-names = "ref_100m";
};
pmc: power-management@100d0000 {
compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
reg = <0x0 0x100d0000 0x0 0x58>;
@ -80,6 +112,15 @@ syscon-poweroff {
};
};
tsensor: thermal-sensor@1fe01460 {
compatible = "loongson,ls2k2000-thermal";
reg = <0x0 0x1fe01460 0x0 0x30>,
<0x0 0x1fe0019c 0x0 0x4>;
interrupt-parent = <&liointc>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <1>;
};
liointc: interrupt-controller@1fe01400 {
compatible = "loongson,liointc-1.0";
reg = <0x0 0x1fe01400 0x0 0x64>;

24
arch/loongarch/configs/loongson3_defconfig
View File

@ -14,6 +14,10 @@ CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_PSI=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_IKHEADERS=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_NUMA_BALANCING=y
CONFIG_MEMCG=y
@ -129,13 +133,22 @@ CONFIG_IP_MROUTE=y
CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_ESPINTCP=y
CONFIG_INET_IPCOMP=m
CONFIG_INET_UDP_DIAG=y
CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_BBR=m
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_ESPINTCP=y
CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_MROUTE=y
CONFIG_MPTCP=y
CONFIG_NETWORK_PHY_TIMESTAMPING=y
@ -151,6 +164,8 @@ CONFIG_NF_CONNTRACK_PPTP=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NF_CT_NETLINK=m
CONFIG_NF_TABLES=m
CONFIG_NF_TABLES_INET=y
CONFIG_NFT_CT=m
CONFIG_NFT_CONNLIMIT=m
CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m
@ -163,6 +178,7 @@ CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m
CONFIG_NFT_HASH=m
CONFIG_NFT_FIB_INET=m
CONFIG_NFT_SOCKET=m
CONFIG_NFT_OSF=m
CONFIG_NFT_TPROXY=m
@ -259,6 +275,7 @@ CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_NF_TABLES_IPV6=y
CONFIG_NFT_FIB_IPV6=m
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_MATCH_AH=m
CONFIG_IP6_NF_MATCH_EUI64=m
@ -279,6 +296,7 @@ CONFIG_IP6_NF_NAT=m
CONFIG_IP6_NF_TARGET_MASQUERADE=m
CONFIG_IP6_NF_TARGET_NPT=m
CONFIG_NF_TABLES_BRIDGE=m
CONFIG_NF_CONNTRACK_BRIDGE=m
CONFIG_BRIDGE_NF_EBTABLES=m
CONFIG_BRIDGE_EBT_BROUTE=m
CONFIG_BRIDGE_EBT_T_FILTER=m
@ -549,6 +567,7 @@ CONFIG_NGBE=y
CONFIG_TXGBE=y
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_NET_VENDOR_XILINX is not set
CONFIG_MOTORCOMM_PHY=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
@ -810,6 +829,7 @@ CONFIG_NTB_SWITCHTEC=m
CONFIG_NTB_PERF=m
CONFIG_NTB_TRANSPORT=m
CONFIG_PWM=y
CONFIG_GENERIC_PHY=y
CONFIG_USB4=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
@ -875,10 +895,13 @@ CONFIG_UBIFS_FS=m
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_CRAMFS=m
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_FILE_DIRECT=y
CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_ZSTD=y
CONFIG_MINIX_FS=m
CONFIG_ROMFS_FS=m
CONFIG_PSTORE=m
@ -960,3 +983,4 @@ CONFIG_DEBUG_FS=y
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_UNWINDER_ORC=y

1
arch/loongarch/include/asm/acpi.h
View File

@ -8,6 +8,7 @@
#ifndef _ASM_LOONGARCH_ACPI_H
#define _ASM_LOONGARCH_ACPI_H
#include <asm/smp.h>
#include <asm/suspend.h>
#ifdef CONFIG_ACPI

6
arch/loongarch/include/asm/asm-prototypes.h
View File

@ -6,3 +6,9 @@
#include <asm/page.h>
#include <asm/ftrace.h>
#include <asm-generic/asm-prototypes.h>
#ifdef CONFIG_ARCH_SUPPORTS_INT128
__int128_t __ashlti3(__int128_t a, int b);
__int128_t __ashrti3(__int128_t a, int b);
__int128_t __lshrti3(__int128_t a, int b);
#endif

3
arch/loongarch/include/asm/perf_event.h
View File

@ -13,8 +13,7 @@
#define perf_arch_fetch_caller_regs(regs, __ip) { \
(regs)->csr_era = (__ip); \
(regs)->regs[3] = current_stack_pointer; \
(regs)->regs[22] = (unsigned long) __builtin_frame_address(0); \
(regs)->regs[3] = (unsigned long) __builtin_frame_address(0); \
}
#endif /* __LOONGARCH_PERF_EVENT_H__ */

6
arch/loongarch/include/asm/smp.h
View File

@ -6,6 +6,8 @@
#ifndef __ASM_SMP_H
#define __ASM_SMP_H
#ifdef CONFIG_SMP
#include <linux/atomic.h>
#include <linux/bitops.h>
#include <linux/linkage.h>
@ -109,4 +111,8 @@ static inline void __cpu_die(unsigned int cpu)
}
#endif
#else /* !CONFIG_SMP */
#define cpu_logical_map(cpu) 0
#endif /* CONFIG_SMP */
#endif /* __ASM_SMP_H */

2
arch/loongarch/kernel/machine_kexec.c
View File

@ -225,6 +225,7 @@ void crash_smp_send_stop(void)
void machine_shutdown(void)
{
#ifdef CONFIG_SMP
int cpu;
/* All CPUs go to reboot_code_buffer */
@ -232,7 +233,6 @@ void machine_shutdown(void)
if (!cpu_online(cpu))
cpu_device_up(get_cpu_device(cpu));
#ifdef CONFIG_SMP
smp_call_function(kexec_shutdown_secondary, NULL, 0);
#endif
}

2
arch/loongarch/lib/Makefile
View File

@ -6,6 +6,8 @@
lib-y += delay.o memset.o memcpy.o memmove.o \
clear_user.o copy_user.o csum.o dump_tlb.o unaligned.o
obj-$(CONFIG_ARCH_SUPPORTS_INT128) += tishift.o
obj-$(CONFIG_CPU_HAS_LSX) += xor_simd.o xor_simd_glue.o
obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o

56
arch/loongarch/lib/tishift.S Normal file
View File

@ -0,0 +1,56 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <asm/asmmacro.h>
#include <linux/export.h>
#include <linux/linkage.h>
SYM_FUNC_START(__ashlti3)
srli.d t2, a0, 1
nor t3, zero, a2
sll.d t1, a1, a2
srl.d t2, t2, t3
andi t0, a2, 64
sll.d a0, a0, a2
or t1, t2, t1
maskeqz a1, a0, t0
masknez a0, a0, t0
masknez t0, t1, t0
or a1, t0, a1
jr ra
SYM_FUNC_END(__ashlti3)
EXPORT_SYMBOL(__ashlti3)
SYM_FUNC_START(__ashrti3)
nor t3, zero, a2
slli.d t2, a1, 1
srl.d t1, a0, a2
sll.d t2, t2, t3
andi t0, a2, 64
or t1, t2, t1
sra.d a2, a1, a2
srai.d a1, a1, 63
maskeqz a0, a2, t0
maskeqz a1, a1, t0
masknez a2, a2, t0
masknez t0, t1, t0
or a1, a1, a2
or a0, t0, a0
jr ra
SYM_FUNC_END(__ashrti3)
EXPORT_SYMBOL(__ashrti3)
SYM_FUNC_START(__lshrti3)
slli.d t2, a1, 1
nor t3, zero, a2
srl.d t1, a0, a2
sll.d t2, t2, t3
andi t0, a2, 64
srl.d a1, a1, a2
or t1, t2, t1
maskeqz a0, a1, t0
masknez a1, a1, t0
masknez t0, t1, t0
or a0, t0, a0
jr ra
SYM_FUNC_END(__lshrti3)
EXPORT_SYMBOL(__lshrti3)

9
arch/loongarch/mm/tlbex.S
View File

@ -125,6 +125,8 @@ vmalloc_load:
tlb_huge_update_load:
#ifdef CONFIG_SMP
ll.d ra, t1, 0
#else
rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1)
#endif
andi t0, ra, _PAGE_PRESENT
beqz t0, nopage_tlb_load
@ -135,7 +137,6 @@ tlb_huge_update_load:
beqz t0, tlb_huge_update_load
ori t0, ra, _PAGE_VALID
#else
rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1)
ori t0, ra, _PAGE_VALID
st.d t0, t1, 0
#endif
@ -281,6 +282,8 @@ vmalloc_store:
tlb_huge_update_store:
#ifdef CONFIG_SMP
ll.d ra, t1, 0
#else
rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1)
#endif
andi t0, ra, _PAGE_PRESENT | _PAGE_WRITE
xori t0, t0, _PAGE_PRESENT | _PAGE_WRITE
@ -292,7 +295,6 @@ tlb_huge_update_store:
beqz t0, tlb_huge_update_store
ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
#else
rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1)
ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
st.d t0, t1, 0
#endif
@ -438,6 +440,8 @@ vmalloc_modify:
tlb_huge_update_modify:
#ifdef CONFIG_SMP
ll.d ra, t1, 0
#else
rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1)
#endif
andi t0, ra, _PAGE_WRITE
beqz t0, nopage_tlb_modify
@ -448,7 +452,6 @@ tlb_huge_update_modify:
beqz t0, tlb_huge_update_modify
ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
#else
rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1)
ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
st.d t0, t1, 0
#endif

4
arch/loongarch/power/suspend.c
View File

@ -24,6 +24,7 @@ struct saved_registers {
u64 kpgd;
u32 pwctl0;
u32 pwctl1;
u64 pcpu_base;
};
static struct saved_registers saved_regs;
@ -36,6 +37,7 @@ void loongarch_common_suspend(void)
saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
saved_regs.pcpu_base = csr_read64(PERCPU_BASE_KS);
loongarch_suspend_addr = loongson_sysconf.suspend_addr;
}
@ -44,7 +46,6 @@ void loongarch_common_resume(void)
{
sync_counter();
local_flush_tlb_all();
csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
csr_write64(eentry, LOONGARCH_CSR_EENTRY);
csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
@ -55,6 +56,7 @@ void loongarch_common_resume(void)
csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1);
csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG);
csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN);
csr_write64(saved_regs.pcpu_base, PERCPU_BASE_KS);
}
int loongarch_acpi_suspend(void)

2
rust/Makefile
View File

@ -426,7 +426,7 @@ $(obj)/core.o: private rustc_objcopy = $(foreach sym,$(redirect-intrinsics),--re
$(obj)/core.o: private rustc_target_flags = $(core-cfgs)
$(obj)/core.o: $(RUST_LIB_SRC)/core/src/lib.rs FORCE
+$(call if_changed_dep,rustc_library)
ifneq ($(or $(CONFIG_X86_64),$(CONFIG_LOONGARCH)),)
ifdef CONFIG_X86_64
$(obj)/core.o: scripts/target.json
endif

2
scripts/Makefile
View File

@ -12,7 +12,7 @@ hostprogs-always-$(CONFIG_SYSTEM_EXTRA_CERTIFICATE) += insert-sys-cert
hostprogs-always-$(CONFIG_RUST_KERNEL_DOCTESTS) += rustdoc_test_builder
hostprogs-always-$(CONFIG_RUST_KERNEL_DOCTESTS) += rustdoc_test_gen
ifneq ($(or $(CONFIG_X86_64),$(CONFIG_LOONGARCH)),)
ifdef CONFIG_X86_64
always-$(CONFIG_RUST) += target.json
filechk_rust_target = $< < include/config/auto.conf

7
scripts/generate_rust_target.rs
View File

@ -164,12 +164,7 @@ fn main() {
ts.push("llvm-target", "x86_64-linux-gnu");
ts.push("target-pointer-width", "64");
} else if cfg.has("LOONGARCH") {
ts.push("arch", "loongarch64");
ts.push("data-layout", "e-m:e-p:64:64-i64:64-i128:128-n64-S128");
ts.push("features", "-f,-d");
ts.push("llvm-target", "loongarch64-linux-gnusf");
ts.push("llvm-abiname", "lp64s");
ts.push("target-pointer-width", "64");
panic!("loongarch uses the builtin rustc loongarch64-unknown-none-softfloat target");
} else {
panic!("Unsupported architecture");
}