Kernel/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-01-17 02:15:57 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: SoC fixes for v5.11, part 3

Browse Source 
The code fixes in this round are all for the Texas Instruments OMAP
 platform, addressing several regressions related to the ti-sysc
 interconnect changes that was merged in linux-5.11 and one recently
 introduced RCU usage warning.
 
 Tero Kristo updates his maintainer file entries as he is changing
 to a new employer.
 
 The other changes are for devicetree files across eight different
 platforms:
 
 TI OMAP:
  - multiple gpio related one-line fixes
 
 Allwinner/sunxi:
  - ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  - soc: sunxi: mbus: Remove DE2 display engine compatibles
 
 NXP lpc32xx:
  - ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
 
 STMicroelectronics stm32
  - multiple minor fixes for DHCOM/DHCOR boards
 
 NXP Layerscape:
  - Fix DCFG address range on LS1046A SoC
 
 Amlogic meson:
  - fix reboot issue on odroid C4
  - revert an ethernet change that caused a regression
  - meson-g12: Set FL-adj property value
 
 Rockchip:
  - multiple minor fixes on 64-bit rockchip machines
 
 Qualcomm:
  - Regression fixes for Lenovo Yoga touchpad and for
    interconnect configuration
  - Boot fixes for 'LPASS' clock configuration on two machines
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmAamF8ACgkQmmx57+YA
 GNmc+g//f7QiGC7f4Ora6StjJEzRoFHff5n6W5BlpyldHcEjo1exDr6V/e/ASaGL
 XAVqqjvd6lI6I788PZyEu+qJ9Ekm2mUDAtCKvrKA63yuPhm540eQLF8f1tX0vziu
 TpYJIYm/g+DtBVM0EvxyNx9fTDAmcnzq+fqnOjqIOufKOFJyr0L1eJDp1nvAaNUo
 a+jILSDa8/FMkd6/W6HSBWWRyGH/p3gme+Uaz5jOj4vHkwNRnuRwFb0q64KiHBBg
 10Aehujt70LD6pKo4W90yBYUEL6w+19mkV2s01jtZZUfZjIEyyX9V5lujfRC4v4G
 DyKO5nJSvlTqBOpbUcF8kbq9FRLbo977jc29aIig4mq5dhOIZ9Xj+XwfnPG4riQp
 fDsxeqGzP73jhI3fwadEnEep7JA5Hopwj0sSW07ZjE3oqKJruvMFs+d18SHeHyOe
 IhBlrwcWXdgA1+k+5MNaTgr91cK4LmUPC5D1ZqO2Hr7qqhIy4yzIWk3cwxCO80T5
 AQC02G2awIKglYqpj4reTR0EVPutvzKiblDKMtTf2WY7l6mQlr8eeQ9jXS+U5pID
 hZ/iWCrNzQWMGUsM1L5DvA/8h+H0AEF3DknnxKS0dh6W3oYuLGrEc1Khs6bQ0c/e
 pxgqGEpAxpbxyhsO0CJhIHEgZ4q4ZDzxJMA41ho7YJNFvVCsqPc=
 =dXiS
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "The code fixes in this round are all for the Texas Instruments OMAP
  platform, addressing several regressions related to the ti-sysc
  interconnect changes that was merged in linux-5.11 and one recently
  introduced RCU usage warning.

  Tero Kristo updates his maintainer file entries as he is changing to a
  new employer.

  The other changes are for devicetree files across eight different
  platforms:

  TI OMAP:
   - multiple gpio related one-line fixes

  Allwinner/sunxi:
   - ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
   - soc: sunxi: mbus: Remove DE2 display engine compatibles

  NXP lpc32xx:
   - ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL

  STMicroelectronics stm32
   - multiple minor fixes for DHCOM/DHCOR boards

  NXP Layerscape:
   - Fix DCFG address range on LS1046A SoC

  Amlogic meson:
   - fix reboot issue on odroid C4
   - revert an ethernet change that caused a regression
   - meson-g12: Set FL-adj property value

  Rockchip:
   - multiple minor fixes on 64-bit rockchip machines

  Qualcomm:
   - Regression fixes for Lenovo Yoga touchpad and for interconnect
     configuration
   - Boot fixes for 'LPASS' clock configuration on two machines"

* tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
  ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  arm64: dts: ls1046a: fix dcfg address range
  soc: sunxi: mbus: Remove DE2 display engine compatibles
  arm64: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
  Revert "arm64: dts: amlogic: add missing ethernet reset ID"
  arm64: dts: rockchip: Disable display for NanoPi R2S
  ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
  arm64: dts: rockchip: remove interrupt-names property from rk3399 vdec node
  drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
  ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
  ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
  arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
  ...
This commit is contained in:
Linus Torvalds 2021-02-03 09:50:59 -08:00
commit 54fe3ffef0
27 changed files with 84 additions and 73 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
MAINTAINERS
View File

@ -2616,8 +2616,8 @@ S: Maintained
F: drivers/power/reset/keystone-reset.c
ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE
M: Tero Kristo <t-kristo@ti.com>
M: Nishanth Menon <nm@ti.com>
M: Tero Kristo <kristo@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
F: Documentation/devicetree/bindings/arm/ti/k3.yaml
@ -6474,9 +6474,9 @@ S: Maintained
F: drivers/edac/skx_*.[ch]
EDAC-TI
M: Tero Kristo <t-kristo@ti.com>
M: Tero Kristo <kristo@kernel.org>
L: linux-edac@vger.kernel.org
S: Maintained
S: Odd Fixes
F: drivers/edac/ti_edac.c
EDIROL UA-101/UA-1000 DRIVER
@ -17572,7 +17572,7 @@ F: include/linux/dma/k3-psil.h
TEXAS INSTRUMENTS' SYSTEM CONTROL INTERFACE (TISCI) PROTOCOL DRIVER
M: Nishanth Menon <nm@ti.com>
M: Tero Kristo <t-kristo@ti.com>
M: Tero Kristo <kristo@kernel.org>
M: Santosh Shilimkar <ssantosh@kernel.org>
L: linux-arm-kernel@lists.infradead.org
S: Maintained
@ -17716,9 +17716,9 @@ S: Maintained
F: drivers/clk/clk-cdce706.c
TI CLOCK DRIVER
M: Tero Kristo <t-kristo@ti.com>
M: Tero Kristo <kristo@kernel.org>
L: linux-omap@vger.kernel.org
S: Maintained
S: Odd Fixes
F: drivers/clk/ti/
F: include/linux/clk/ti.h

3
arch/arm/boot/dts/lpc32xx.dtsi
View File

@ -326,9 +326,6 @@
clocks = <&xtal_32k>, <&xtal>;
clock-names = "xtal_32k", "xtal";
assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>;
assigned-clock-rates = <208000000>;
};
};

3
arch/arm/boot/dts/omap3-gta04.dtsi
View File

@ -114,7 +114,7 @@
gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
/* lcd panel */
@ -124,7 +124,6 @@
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
spi-cs-high;
backlight= <&backlight>;
label = "lcd";

5
arch/arm/boot/dts/omap4-droid4-xt894.dts
View File

@ -16,8 +16,13 @@
debounce-interval = <10>;
};
/*
* We use pad 0x4a100116 abe_dmic_din3.gpio_122 as the irq instead
* of the gpio interrupt to avoid lost events in deeper idle states.
*/
slider {
label = "Keypad Slide";
interrupts-extended = <&omap4_pmx_core 0xd6>;
gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio122 */
linux,input-type = <EV_SW>;
linux,code = <SW_KEYPAD_SLIDE>;

16
arch/arm/boot/dts/stm32mp15xx-dhcom-drc02.dtsi
View File

@ -33,9 +33,9 @@
* during TX anyway and that it only controls drive enable DE
* line. Hence, the RX is always enabled here.
*/
rs485-rx-en {
rs485-rx-en-hog {
gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>;
gpios = <8 0>;
output-low;
line-name = "rs485-rx-en";
};
@ -61,9 +61,9 @@
* order to reset the Hub when USB bus is powered down, but
* so far there is no such functionality.
*/
usb-hub {
usb-hub-hog {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
gpios = <2 0>;
output-high;
line-name = "usb-hub-reset";
};
@ -87,6 +87,12 @@
};
};
&i2c4 {
touchscreen@49 {
status = "disabled";
};
};
&i2c5 { /* TP7/TP8 */
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins_a>;
@ -104,7 +110,7 @@
* are used for on-board microSD slot instead.
*/
/delete-property/broken-cd;
cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
disable-wp;
};

4
arch/arm/boot/dts/stm32mp15xx-dhcom-picoitx.dtsi
View File

@ -43,9 +43,9 @@
* in order to turn on port power when USB bus is powered up, but so
* far there is no such functionality.
*/
usb-port-power {
usb-port-power-hog {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
gpios = <13 0>;
output-low;
line-name = "usb-port-power";
};

3
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View File

@ -390,7 +390,8 @@
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
broken-cd;
cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;

2
arch/arm/boot/dts/sun7i-a20-bananapro.dts
View File

@ -110,7 +110,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};

2
arch/arm/mach-omap1/board-osk.c
View File

@ -203,6 +203,8 @@ static int osk_tps_setup(struct i2c_client *client, void *context)
*/
gpio_request(OSK_TPS_GPIO_USB_PWR_EN, "n_vbus_en");
gpio_direction_output(OSK_TPS_GPIO_USB_PWR_EN, 1);
/* Free the GPIO again as the driver will request it */
gpio_free(OSK_TPS_GPIO_USB_PWR_EN);
/* Set GPIO 2 high so LED D3 is off by default */
tps65010_set_gpio_out_value(GPIO2, HIGH);

28
arch/arm/mach-omap2/Kconfig
View File

@ -17,11 +17,10 @@ config ARCH_OMAP3
bool "TI OMAP3"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM
select ARM_CPU_SUSPEND
select OMAP_HWMOD
select OMAP_INTERCONNECT
select PM_OPP if PM
select PM if CPU_IDLE
select PM_OPP
select SOC_HAS_OMAP2_SDRC
select ARM_ERRATA_430973
@ -30,7 +29,7 @@ config ARCH_OMAP4
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
select ARM_CPU_SUSPEND if PM
select ARM_CPU_SUSPEND
select ARM_ERRATA_720789
select ARM_GIC
select HAVE_ARM_SCU if SMP
@ -40,7 +39,7 @@ config ARCH_OMAP4
select OMAP_INTERCONNECT_BARRIER
select PL310_ERRATA_588369 if CACHE_L2X0
select PL310_ERRATA_727915 if CACHE_L2X0
select PM_OPP if PM
select PM_OPP
select PM if CPU_IDLE
select ARM_ERRATA_754322
select ARM_ERRATA_775420
@ -50,7 +49,7 @@ config SOC_OMAP5
bool "TI OMAP5"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM
select ARM_CPU_SUSPEND
select ARM_GIC
select HAVE_ARM_SCU if SMP
select HAVE_ARM_ARCH_TIMER
@ -58,14 +57,14 @@ config SOC_OMAP5
select OMAP_HWMOD
select OMAP_INTERCONNECT
select OMAP_INTERCONNECT_BARRIER
select PM_OPP if PM
select PM_OPP
select ZONE_DMA if ARM_LPAE
config SOC_AM33XX
bool "TI AM33XX"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM
select ARM_CPU_SUSPEND
config SOC_AM43XX
bool "TI AM43x"
@ -79,13 +78,13 @@ config SOC_AM43XX
select ARM_ERRATA_754322
select ARM_ERRATA_775420
select OMAP_INTERCONNECT
select ARM_CPU_SUSPEND if PM
select ARM_CPU_SUSPEND
config SOC_DRA7XX
bool "TI DRA7XX"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM
select ARM_CPU_SUSPEND
select ARM_GIC
select HAVE_ARM_SCU if SMP
select HAVE_ARM_ARCH_TIMER
@ -94,7 +93,7 @@ config SOC_DRA7XX
select OMAP_HWMOD
select OMAP_INTERCONNECT
select OMAP_INTERCONNECT_BARRIER
select PM_OPP if PM
select PM_OPP
select ZONE_DMA if ARM_LPAE
select PINCTRL_TI_IODELAY if OF && PINCTRL
@ -112,9 +111,11 @@ config ARCH_OMAP2PLUS
select OMAP_DM_TIMER
select OMAP_GPMC
select PINCTRL
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM
select PM
select PM_GENERIC_DOMAINS
select PM_GENERIC_DOMAINS_OF
select RESET_CONTROLLER
select SIMPLE_PM_BUS
select SOC_BUS
select TI_SYSC
select OMAP_IRQCHIP
@ -140,7 +141,6 @@ config ARCH_OMAP2PLUS_TYPICAL
select I2C_OMAP
select MENELAUS if ARCH_OMAP2
select NEON if CPU_V7
select PM
select REGULATOR
select REGULATOR_FIXED_VOLTAGE
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4

16
arch/arm/mach-omap2/cpuidle44xx.c
View File

@ -151,10 +151,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
(cx->mpu_logic_state == PWRDM_POWER_OFF);
/* Enter broadcast mode for periodic timers */
tick_broadcast_enable();
RCU_NONIDLE(tick_broadcast_enable());
/* Enter broadcast mode for one-shot timers */
tick_broadcast_enter();
RCU_NONIDLE(tick_broadcast_enter());
/*
* Call idle CPU PM enter notifier chain so that
@ -166,7 +166,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
if (dev->cpu == 0) {
pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
RCU_NONIDLE(omap_set_pwrdm_state(mpu_pd, cx->mpu_state));
/*
* Call idle CPU cluster PM enter notifier chain
@ -178,7 +178,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
index = 0;
cx = state_ptr + index;
pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
RCU_NONIDLE(omap_set_pwrdm_state(mpu_pd, cx->mpu_state));
mpuss_can_lose_context = 0;
}
}
@ -194,9 +194,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
mpuss_can_lose_context)
gic_dist_disable();
clkdm_deny_idle(cpu_clkdm[1]);
omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
clkdm_allow_idle(cpu_clkdm[1]);
RCU_NONIDLE(clkdm_deny_idle(cpu_clkdm[1]));
RCU_NONIDLE(omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON));
RCU_NONIDLE(clkdm_allow_idle(cpu_clkdm[1]));
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
mpuss_can_lose_context) {
@ -222,7 +222,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
cpu_pm_exit();
cpu_pm_out:
tick_broadcast_exit();
RCU_NONIDLE(tick_broadcast_exit());
fail:
cpuidle_coupled_parallel_barrier(dev, &abort_barrier);

1
arch/arm/mach-omap2/pdata-quirks.c
View File

@ -522,6 +522,7 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
&dra7_ipu1_dsp_iommu_pdata),
#endif
/* Common auxdata */
OF_DEV_AUXDATA("simple-pm-bus", 0, NULL, omap_auxdata_lookup),
OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata),

2
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
View File

@ -280,8 +280,6 @@
"timing-adjustment";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
status = "disabled";
};

4
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View File

@ -224,8 +224,6 @@
"timing-adjustment";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
status = "disabled";
mdio0: mdio {
@ -2390,7 +2388,7 @@
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,dis_u2_susphy_quirk;
snps,quirk-frame-length-adjustment;
snps,quirk-frame-length-adjustment = <0x20>;
snps,parkmode-disable-ss-quirk;
};
};

3
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
View File

@ -13,7 +13,6 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/meson-gxbb-power.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@ -576,8 +575,6 @@
interrupt-names = "macirq";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
status = "disabled";
};

2
arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
View File

@ -52,7 +52,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
enable-active-high;
regulator-always-on;
};

2
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
View File

@ -385,7 +385,7 @@
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x10000>;
reg = <0x0 0x1ee0000 0x0 0x1000>;
big-endian;
};

4
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View File

@ -415,7 +415,9 @@
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
&gpu {

14
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
View File

@ -302,7 +302,9 @@
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
&gpu {
@ -320,6 +322,8 @@
&i2c3 {
status = "okay";
clock-frequency = <400000>;
/* Overwrite pinctrl-0 from sdm845.dtsi */
pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
tsel: hid@15 {
compatible = "hid-over-i2c";
@ -327,9 +331,6 @@
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_hid_active>;
};
tsc2: hid@2c {
@ -338,11 +339,6 @@
hid-descr-addr = <0x20>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_hid_active>;
status = "disabled";
};
};

2
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@ -1097,7 +1097,7 @@
vopl_mmu: iommu@ff470f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff470f00 0x0 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu";
clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;
clock-names = "aclk", "iface";

4
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
View File

@ -114,6 +114,10 @@
cpu-supply = <&vdd_arm>;
};
&display_subsystem {
status = "disabled";
};
&gmac2io {
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;

1
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
View File

@ -790,7 +790,6 @@
&pcie0 {
bus-scan-delay-ms = <1000>;
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
max-link-speed = <2>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;

3
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@ -234,6 +234,7 @@
reg = <0x0 0xf8000000 0x0 0x2000000>,
<0x0 0xfd000000 0x0 0x1000000>;
reg-names = "axi-base", "apb-base";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
@ -252,7 +253,6 @@
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
linux,pci-domain = <0>;
max-link-speed = <1>;
msi-map = <0x0 &its 0x0 0x1000>;
phys = <&pcie_phy 0>, <&pcie_phy 1>,
@ -1278,7 +1278,6 @@
compatible = "rockchip,rk3399-vdec";
reg = <0x0 0xff660000 0x0 0x400>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "vdpu";
clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
<&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
clock-names = "axi", "ahb", "cabac", "core";

2
arch/arm64/configs/defconfig
View File

@ -1076,7 +1076,7 @@ CONFIG_INTERCONNECT=y
CONFIG_INTERCONNECT_QCOM=y
CONFIG_INTERCONNECT_QCOM_MSM8916=m
CONFIG_INTERCONNECT_QCOM_OSM_L3=m
CONFIG_INTERCONNECT_QCOM_SDM845=m
CONFIG_INTERCONNECT_QCOM_SDM845=y
CONFIG_INTERCONNECT_QCOM_SM8150=m
CONFIG_INTERCONNECT_QCOM_SM8250=m
CONFIG_EXT2_FS=y

3
drivers/bus/simple-pm-bus.c
View File

@ -16,6 +16,7 @@
static int simple_pm_bus_probe(struct platform_device *pdev)
{
const struct of_dev_auxdata *lookup = dev_get_platdata(&pdev->dev);
struct device_node *np = pdev->dev.of_node;
dev_dbg(&pdev->dev, "%s\n", __func__);
@ -23,7 +24,7 @@ static int simple_pm_bus_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
if (np)
of_platform_populate(np, NULL, NULL, &pdev->dev);
of_platform_populate(np, NULL, lookup, &pdev->dev);
return 0;
}

5
drivers/soc/sunxi/sunxi_mbus.c
View File

@ -23,12 +23,7 @@ static const char * const sunxi_mbus_devices[] = {
"allwinner,sun7i-a20-display-engine",
"allwinner,sun8i-a23-display-engine",
"allwinner,sun8i-a33-display-engine",
"allwinner,sun8i-a83t-display-engine",
"allwinner,sun8i-h3-display-engine",
"allwinner,sun8i-r40-display-engine",
"allwinner,sun8i-v3s-display-engine",
"allwinner,sun9i-a80-display-engine",
"allwinner,sun50i-a64-display-engine",
/*
* And now we have the regular devices connected to the MBUS

11
drivers/soc/ti/omap_prm.c
View File

@ -860,6 +860,7 @@ static int omap_prm_reset_init(struct platform_device *pdev,
const struct omap_rst_map *map;
struct ti_prm_platform_data *pdata = dev_get_platdata(&pdev->dev);
char buf[32];
u32 v;
/*
* Check if we have controllable resets. If either rstctrl is non-zero
@ -907,6 +908,16 @@ static int omap_prm_reset_init(struct platform_device *pdev,
map++;
}
/* Quirk handling to assert rst_map_012 bits on reset and avoid errors */
if (prm->data->rstmap == rst_map_012) {
v = readl_relaxed(reset->prm->base + reset->prm->data->rstctrl);
if ((v & reset->mask) != reset->mask) {
dev_dbg(&pdev->dev, "Asserting all resets: %08x\n", v);
writel_relaxed(reset->mask, reset->prm->base +
reset->prm->data->rstctrl);
}
}
return devm_reset_controller_register(&pdev->dev, &reset->rcdev);
}