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interconnect changes for 6.13

Browse Source 
This pull request contains the interconnect changes for the 6.13-rc1 merge
 window. It contains new drivers and clean-ups with the following highlights:
 
 Core changes:
 - Remove a useless kfree_const() usage
 - Switch back to struct platform_driver::remove()
 - Use of_property_present() for non-boolean properties
 
 Driver changes:
 - New driver for QCS615 platforms
 - New driver for SAR2130P platforms
 - New driver for QCS8300 platforms
 - Probe defer incase of missing QoS clock dependency in rpmh driver
 - Rename qos_clks_required flag to qos_requires_clocks in rpmh driver
 - Constify pointers to qcom_icc_node in msm8937 driver
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
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Merge tag 'icc-6.13-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 6.13

This pull request contains the interconnect changes for the 6.13-rc1 merge
window. It contains new drivers and clean-ups with the following highlights:

Core changes:
- Remove a useless kfree_const() usage
- Switch back to struct platform_driver::remove()
- Use of_property_present() for non-boolean properties

Driver changes:
- New driver for QCS615 platforms
- New driver for SAR2130P platforms
- New driver for QCS8300 platforms
- Probe defer incase of missing QoS clock dependency in rpmh driver
- Rename qos_clks_required flag to qos_requires_clocks in rpmh driver
- Constify pointers to qcom_icc_node in msm8937 driver

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-6.13-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: Use of_property_present() for non-boolean properties
  dt-bindings: interconnect: qcom-bwmon: Document QCS8300 bwmon compatibles
  interconnect: qcom: add QCS8300 interconnect provider driver
  interconnect: Switch back to struct platform_driver::remove()
  interconnect: qcom: add support for SAR2130P
  dt-bindings: interconnect: qcom: document SAR2130P NoC
  interconnect: qcom: add QCS615 interconnect provider driver
  dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in QCS615 SoC
  dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in QCS8300 SoC
  interconnect: Remove a useless kfree_const() usage
  interconnect: qcom: msm8937: constify pointer to qcom_icc_node
  interconnect: qcom: icc-rpmh: rename qos_clks_required flag
  interconnect: qcom: icc-rpmh: probe defer incase of missing QoS clock dependency
This commit is contained in:
Greg Kroah-Hartman 2024-11-11 15:34:11 +01:00
commit 5a5470dd8a
58 changed files with 6701 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
View File

@ -26,6 +26,7 @@ properties:
- items:
- enum:
- qcom,qcm2290-cpu-bwmon
- qcom,qcs8300-cpu-bwmon
- qcom,sa8775p-cpu-bwmon
- qcom,sc7180-cpu-bwmon
- qcom,sc7280-cpu-bwmon
@ -40,6 +41,7 @@ properties:
- const: qcom,sdm845-bwmon # BWMON v4, unified register space
- items:
- enum:
- qcom,qcs8300-llcc-bwmon
- qcom,sa8775p-llcc-bwmon
- qcom,sc7180-llcc-bwmon
- qcom,sc8280xp-llcc-bwmon

73
Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml Normal file
View File

@ -0,0 +1,73 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,qcs615-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on QCS615
maintainers:
- Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also: include/dt-bindings/interconnect/qcom,qcs615-rpmh.h
properties:
compatible:
enum:
- qcom,qcs615-aggre1-noc
- qcom,qcs615-camnoc-virt
- qcom,qcs615-config-noc
- qcom,qcs615-dc-noc
- qcom,qcs615-gem-noc
- qcom,qcs615-ipa-virt
- qcom,qcs615-mc-virt
- qcom,qcs615-mmss-noc
- qcom,qcs615-system-noc
reg:
maxItems: 1
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,qcs615-camnoc-virt
- qcom,qcs615-ipa-virt
- qcom,qcs615-mc-virt
then:
properties:
reg: false
else:
required:
- reg
unevaluatedProperties: false
examples:
- |
gem_noc: interconnect@9680000 {
compatible = "qcom,qcs615-gem-noc";
reg = <0x9680000 0x3e200>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect-2 {
compatible = "qcom,qcs615-mc-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

72
Documentation/devicetree/bindings/interconnect/qcom,qcs8300-rpmh.yaml Normal file
View File

@ -0,0 +1,72 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,qcs8300-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on QCS8300
maintainers:
- Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM).
See also: include/dt-bindings/interconnect/qcom,qcs8300-rpmh.h
properties:
compatible:
enum:
- qcom,qcs8300-aggre1-noc
- qcom,qcs8300-aggre2-noc
- qcom,qcs8300-clk-virt
- qcom,qcs8300-config-noc
- qcom,qcs8300-dc-noc
- qcom,qcs8300-gem-noc
- qcom,qcs8300-gpdsp-anoc
- qcom,qcs8300-lpass-ag-noc
- qcom,qcs8300-mc-virt
- qcom,qcs8300-mmss-noc
- qcom,qcs8300-nspa-noc
- qcom,qcs8300-pcie-anoc
- qcom,qcs8300-system-noc
reg:
maxItems: 1
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,qcs8300-clk-virt
- qcom,qcs8300-mc-virt
then:
properties:
reg: false
else:
required:
- reg
unevaluatedProperties: false
examples:
- |
gem_noc: interconnect@9100000 {
compatible = "qcom,qcs8300-gem-noc";
reg = <0x9100000 0xf7080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
clk_virt: interconnect-0 {
compatible = "qcom,qcs8300-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

117
Documentation/devicetree/bindings/interconnect/qcom,sar2130p-rpmh.yaml Normal file
View File

@ -0,0 +1,117 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sar2130p-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SAR2130P
maintainers:
- Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
- Georgi Djakov <djakov@kernel.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also:: include/dt-bindings/interconnect/qcom,sar2130p-rpmh.h
properties:
compatible:
enum:
- qcom,sar2130p-clk-virt
- qcom,sar2130p-config-noc
- qcom,sar2130p-gem-noc
- qcom,sar2130p-lpass-ag-noc
- qcom,sar2130p-mc-virt
- qcom,sar2130p-mmss-noc
- qcom,sar2130p-nsp-noc
- qcom,sar2130p-pcie-anoc
- qcom,sar2130p-system-noc
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-clk-virt
- qcom,sar2130p-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-pcie-anoc
then:
properties:
clocks:
items:
- description: aggre-NOC PCIe AXI clock
- description: cfg-NOC PCIe a-NOC AHB clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-system-noc
then:
properties:
clocks:
items:
- description: aggre USB3 PRIM AXI clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-system-noc
- qcom,sar2130p-pcie-anoc
then:
required:
- clocks
else:
properties:
clocks: false
unevaluatedProperties: false
examples:
- |
clk_virt: interconnect-0 {
compatible = "qcom,sar2130p-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@1680000 {
compatible = "qcom,sar2130p-system-noc";
reg = <0x01680000 0x29080>;
#interconnect-cells = <2>;
clocks = <&gcc_prim_axi_clk>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

4
drivers/interconnect/core.c
View File

@ -808,7 +808,7 @@ void icc_put(struct icc_path *path)
mutex_unlock(&icc_bw_lock);
mutex_unlock(&icc_lock);
kfree_const(path->name);
kfree(path->name);
kfree(path);
}
EXPORT_SYMBOL_GPL(icc_put);
@ -1081,7 +1081,7 @@ static int of_count_icc_providers(struct device_node *np)
int count = 0;
for_each_available_child_of_node(np, child) {
if (of_property_read_bool(child, "#interconnect-cells") &&
if (of_property_present(child, "#interconnect-cells") &&
likely(!of_match_node(ignore_list, child)))
count++;
count += of_count_icc_providers(child);

2
drivers/interconnect/imx/imx8mm.c
View File

@ -88,7 +88,7 @@ static int imx8mm_icc_probe(struct platform_device *pdev)
static struct platform_driver imx8mm_icc_driver = {
.probe = imx8mm_icc_probe,
.remove_new = imx_icc_unregister,
.remove = imx_icc_unregister,
.driver = {
.name = "imx8mm-interconnect",
},

2
drivers/interconnect/imx/imx8mn.c
View File

@ -77,7 +77,7 @@ static int imx8mn_icc_probe(struct platform_device *pdev)
static struct platform_driver imx8mn_icc_driver = {
.probe = imx8mn_icc_probe,
.remove_new = imx_icc_unregister,
.remove = imx_icc_unregister,
.driver = {
.name = "imx8mn-interconnect",
},

2
drivers/interconnect/imx/imx8mp.c
View File

@ -241,7 +241,7 @@ static int imx8mp_icc_probe(struct platform_device *pdev)
static struct platform_driver imx8mp_icc_driver = {
.probe = imx8mp_icc_probe,
.remove_new = imx_icc_unregister,
.remove = imx_icc_unregister,
.driver = {
.name = "imx8mp-interconnect",
},

2
drivers/interconnect/imx/imx8mq.c
View File

@ -87,7 +87,7 @@ static int imx8mq_icc_probe(struct platform_device *pdev)
static struct platform_driver imx8mq_icc_driver = {
.probe = imx8mq_icc_probe,
.remove_new = imx_icc_unregister,
.remove = imx_icc_unregister,
.driver = {
.name = "imx8mq-interconnect",
.sync_state = icc_sync_state,

2
drivers/interconnect/mediatek/mt8183.c
View File

@ -133,7 +133,7 @@ static struct platform_driver mtk_emi_icc_mt8183_driver = {
.sync_state = icc_sync_state,
},
.probe = mtk_emi_icc_probe,
.remove_new = mtk_emi_icc_remove,
.remove = mtk_emi_icc_remove,
};
module_platform_driver(mtk_emi_icc_mt8183_driver);

2
drivers/interconnect/mediatek/mt8195.c
View File

@ -329,7 +329,7 @@ static struct platform_driver mtk_emi_icc_mt8195_driver = {
.sync_state = icc_sync_state,
},
.probe = mtk_emi_icc_probe,
.remove_new = mtk_emi_icc_remove,
.remove = mtk_emi_icc_remove,
};
module_platform_driver(mtk_emi_icc_mt8195_driver);

29
drivers/interconnect/qcom/Kconfig
View File

@ -105,6 +105,26 @@ config INTERCONNECT_QCOM_QCS404
This is a driver for the Qualcomm Network-on-Chip on qcs404-based
platforms.
config INTERCONNECT_QCOM_QCS615
tristate "Qualcomm QCS615 interconnect driver"
depends on INTERCONNECT_QCOM_RPMH_POSSIBLE
select INTERCONNECT_QCOM_RPMH
select INTERCONNECT_QCOM_BCM_VOTER
help
This is a driver for the Qualcomm Network-on-Chip on qcs615-based
platforms.
config INTERCONNECT_QCOM_QCS8300
tristate "Qualcomm QCS8300 interconnect driver"
depends on INTERCONNECT_QCOM_RPMH_POSSIBLE
select INTERCONNECT_QCOM_RPMH
select INTERCONNECT_QCOM_BCM_VOTER
help
This is a driver for the Qualcomm Technologies, Inc. Network-on-Chip
on QCS8300-based platforms. The interconnect provider collects and
aggreagates the cosumer bandwidth requests to satisfy constraints
placed on Network-on-Chip performance states.
config INTERCONNECT_QCOM_QDU1000
tristate "Qualcomm QDU1000/QRU1000 interconnect driver"
depends on INTERCONNECT_QCOM_RPMH_POSSIBLE
@ -137,6 +157,15 @@ config INTERCONNECT_QCOM_SA8775P
This is a driver for the Qualcomm Network-on-Chip on sa8775p-based
platforms.
config INTERCONNECT_QCOM_SAR2130P
tristate "Qualcomm SAR2130P interconnect driver"
depends on INTERCONNECT_QCOM_RPMH_POSSIBLE
select INTERCONNECT_QCOM_RPMH
select INTERCONNECT_QCOM_BCM_VOTER
help
This is a driver for the Qualcomm Network-on-Chip on SAR2130P-based
platforms.
config INTERCONNECT_QCOM_SC7180
tristate "Qualcomm SC7180 interconnect driver"
depends on INTERCONNECT_QCOM_RPMH_POSSIBLE

6
drivers/interconnect/qcom/Makefile
View File

@ -15,9 +15,12 @@ qnoc-msm8996-objs := msm8996.o
icc-osm-l3-objs := osm-l3.o
qnoc-qcm2290-objs := qcm2290.o
qnoc-qcs404-objs := qcs404.o
qnoc-qcs615-objs := qcs615.o
qnoc-qcs8300-objs := qcs8300.o
qnoc-qdu1000-objs := qdu1000.o
icc-rpmh-obj := icc-rpmh.o
qnoc-sa8775p-objs := sa8775p.o
qnoc-sar2130p-objs := sar2130p.o
qnoc-sc7180-objs := sc7180.o
qnoc-sc7280-objs := sc7280.o
qnoc-sc8180x-objs := sc8180x.o
@ -52,9 +55,12 @@ obj-$(CONFIG_INTERCONNECT_QCOM_MSM8996) += qnoc-msm8996.o
obj-$(CONFIG_INTERCONNECT_QCOM_OSM_L3) += icc-osm-l3.o
obj-$(CONFIG_INTERCONNECT_QCOM_QCM2290) += qnoc-qcm2290.o
obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += qnoc-qcs404.o
obj-$(CONFIG_INTERCONNECT_QCOM_QCS615) += qnoc-qcs615.o
obj-$(CONFIG_INTERCONNECT_QCOM_QCS8300) += qnoc-qcs8300.o
obj-$(CONFIG_INTERCONNECT_QCOM_QDU1000) += qnoc-qdu1000.o
obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o
obj-$(CONFIG_INTERCONNECT_QCOM_SA8775P) += qnoc-sa8775p.o
obj-$(CONFIG_INTERCONNECT_QCOM_SAR2130P) += qnoc-sar2130p.o
obj-$(CONFIG_INTERCONNECT_QCOM_SC7180) += qnoc-sc7180.o
obj-$(CONFIG_INTERCONNECT_QCOM_SC7280) += qnoc-sc7280.o
obj-$(CONFIG_INTERCONNECT_QCOM_SC8180X) += qnoc-sc8180x.o

5
drivers/interconnect/qcom/icc-rpmh.c
View File

@ -311,7 +311,10 @@ int qcom_icc_rpmh_probe(struct platform_device *pdev)
}
qp->num_clks = devm_clk_bulk_get_all(qp->dev, &qp->clks);
if (qp->num_clks < 0 || (!qp->num_clks && desc->qos_clks_required)) {
if (qp->num_clks == -EPROBE_DEFER)
return dev_err_probe(dev, qp->num_clks, "Failed to get QoS clocks\n");
if (qp->num_clks < 0 || (!qp->num_clks && desc->qos_requires_clocks)) {
dev_info(dev, "Skipping QoS, failed to get clk: %d\n", qp->num_clks);
goto skip_qos_config;
}

2
drivers/interconnect/qcom/icc-rpmh.h
View File

@ -153,7 +153,7 @@ struct qcom_icc_desc {
size_t num_nodes;
struct qcom_icc_bcm * const *bcms;
size_t num_bcms;
bool qos_clks_required;
bool qos_requires_clocks;
};
int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,

2
drivers/interconnect/qcom/msm8909.c
View File

@ -1316,7 +1316,7 @@ MODULE_DEVICE_TABLE(of, msm8909_noc_of_match);
static struct platform_driver msm8909_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-msm8909",
.of_match_table = msm8909_noc_of_match,

2
drivers/interconnect/qcom/msm8916.c
View File

@ -1344,7 +1344,7 @@ MODULE_DEVICE_TABLE(of, msm8916_noc_of_match);
static struct platform_driver msm8916_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-msm8916",
.of_match_table = msm8916_noc_of_match,

10
drivers/interconnect/qcom/msm8937.c
View File

@ -1175,7 +1175,7 @@ static struct qcom_icc_node slv_lpass = {
.qos.qos_mode = NOC_QOS_MODE_INVALID,
};
static struct qcom_icc_node *msm8937_bimc_nodes[] = {
static struct qcom_icc_node * const msm8937_bimc_nodes[] = {
[MAS_APPS_PROC] = &mas_apps_proc,
[MAS_OXILI] = &mas_oxili,
[MAS_SNOC_BIMC_0] = &mas_snoc_bimc_0,
@ -1204,7 +1204,7 @@ static const struct qcom_icc_desc msm8937_bimc = {
.ab_coeff = 154,
};
static struct qcom_icc_node *msm8937_pcnoc_nodes[] = {
static struct qcom_icc_node * const msm8937_pcnoc_nodes[] = {
[MAS_SPDM] = &mas_spdm,
[MAS_BLSP_1] = &mas_blsp_1,
[MAS_BLSP_2] = &mas_blsp_2,
@ -1268,7 +1268,7 @@ static const struct qcom_icc_desc msm8937_pcnoc = {
.regmap_cfg = &msm8937_pcnoc_regmap_config,
};
static struct qcom_icc_node *msm8937_snoc_nodes[] = {
static struct qcom_icc_node * const msm8937_snoc_nodes[] = {
[MAS_QDSS_BAM] = &mas_qdss_bam,
[MAS_BIMC_SNOC] = &mas_bimc_snoc,
[MAS_PCNOC_SNOC] = &mas_pcnoc_snoc,
@ -1304,7 +1304,7 @@ static const struct qcom_icc_desc msm8937_snoc = {
.qos_offset = 0x7000,
};
static struct qcom_icc_node *msm8937_snoc_mm_nodes[] = {
static struct qcom_icc_node * const msm8937_snoc_mm_nodes[] = {
[MAS_JPEG] = &mas_jpeg,
[MAS_MDP] = &mas_mdp,
[MAS_VENUS] = &mas_venus,
@ -1337,7 +1337,7 @@ MODULE_DEVICE_TABLE(of, msm8937_noc_of_match);
static struct platform_driver msm8937_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-msm8937",
.of_match_table = msm8937_noc_of_match,

2
drivers/interconnect/qcom/msm8939.c
View File

@ -1421,7 +1421,7 @@ MODULE_DEVICE_TABLE(of, msm8939_noc_of_match);
static struct platform_driver msm8939_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-msm8939",
.of_match_table = msm8939_noc_of_match,

2
drivers/interconnect/qcom/msm8953.c
View File

@ -1310,7 +1310,7 @@ static const struct of_device_id msm8953_noc_of_match[] = {
static struct platform_driver msm8953_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-msm8953",
.of_match_table = msm8953_noc_of_match,

2
drivers/interconnect/qcom/msm8974.c
View File

@ -762,7 +762,7 @@ MODULE_DEVICE_TABLE(of, msm8974_noc_of_match);
static struct platform_driver msm8974_noc_driver = {
.probe = msm8974_icc_probe,
.remove_new = msm8974_icc_remove,
.remove = msm8974_icc_remove,
.driver = {
.name = "qnoc-msm8974",
.of_match_table = msm8974_noc_of_match,

2
drivers/interconnect/qcom/msm8976.c
View File

@ -1427,7 +1427,7 @@ MODULE_DEVICE_TABLE(of, msm8976_noc_of_match);
static struct platform_driver msm8976_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-msm8976",
.of_match_table = msm8976_noc_of_match,

2
drivers/interconnect/qcom/msm8996.c
View File

@ -2108,7 +2108,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-msm8996",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/osm-l3.c
View File

@ -290,7 +290,7 @@ MODULE_DEVICE_TABLE(of, osm_l3_of_match);
static struct platform_driver osm_l3_driver = {
.probe = qcom_osm_l3_probe,
.remove_new = qcom_osm_l3_remove,
.remove = qcom_osm_l3_remove,
.driver = {
.name = "osm-l3",
.of_match_table = osm_l3_of_match,

2
drivers/interconnect/qcom/qcm2290.c
View File

@ -1367,7 +1367,7 @@ MODULE_DEVICE_TABLE(of, qcm2290_noc_of_match);
static struct platform_driver qcm2290_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-qcm2290",
.of_match_table = qcm2290_noc_of_match,

2
drivers/interconnect/qcom/qcs404.c
View File

@ -1204,7 +1204,7 @@ MODULE_DEVICE_TABLE(of, qcs404_noc_of_match);
static struct platform_driver qcs404_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-qcs404",
.of_match_table = qcs404_noc_of_match,

1563
drivers/interconnect/qcom/qcs615.c Normal file
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File diff suppressed because it is too large Load Diff

128
drivers/interconnect/qcom/qcs615.h Normal file
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@ -0,0 +1,128 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DRIVERS_INTERCONNECT_QCOM_QCS615_H
#define __DRIVERS_INTERCONNECT_QCOM_QCS615_H
#define QCS615_MASTER_A1NOC_CFG 1
#define QCS615_MASTER_A1NOC_SNOC 2
#define QCS615_MASTER_ANOC_PCIE_SNOC 3
#define QCS615_MASTER_APPSS_PROC 4
#define QCS615_MASTER_BLSP_1 5
#define QCS615_MASTER_CAMNOC_HF0 6
#define QCS615_MASTER_CAMNOC_HF0_UNCOMP 7
#define QCS615_MASTER_CAMNOC_HF1 8
#define QCS615_MASTER_CAMNOC_HF1_UNCOMP 9
#define QCS615_MASTER_CAMNOC_SF 10
#define QCS615_MASTER_CAMNOC_SF_UNCOMP 11
#define QCS615_MASTER_CNOC_A2NOC 12
#define QCS615_MASTER_CNOC_DC_NOC 13
#define QCS615_MASTER_CNOC_MNOC_CFG 14
#define QCS615_MASTER_CRYPTO 15
#define QCS615_MASTER_EMAC_EVB 16
#define QCS615_MASTER_GEM_NOC_CFG 17
#define QCS615_MASTER_GEM_NOC_PCIE_SNOC 18
#define QCS615_MASTER_GEM_NOC_SNOC 19
#define QCS615_MASTER_GFX3D 20
#define QCS615_MASTER_GIC 21
#define QCS615_MASTER_GPU_TCU 22
#define QCS615_MASTER_IPA 23
#define QCS615_MASTER_IPA_CORE 24
#define QCS615_MASTER_LLCC 25
#define QCS615_MASTER_LPASS_ANOC 26
#define QCS615_MASTER_MDP0 27
#define QCS615_MASTER_MNOC_HF_MEM_NOC 28
#define QCS615_MASTER_MNOC_SF_MEM_NOC 29
#define QCS615_MASTER_PCIE 30
#define QCS615_MASTER_PIMEM 31
#define QCS615_MASTER_QDSS_BAM 32
#define QCS615_MASTER_QDSS_DAP 33
#define QCS615_MASTER_QDSS_ETR 34
#define QCS615_MASTER_QSPI 35
#define QCS615_MASTER_QUP_0 36
#define QCS615_MASTER_ROTATOR 37
#define QCS615_MASTER_SDCC_1 38
#define QCS615_MASTER_SDCC_2 39
#define QCS615_MASTER_SNOC_CFG 40
#define QCS615_MASTER_SNOC_CNOC 41
#define QCS615_MASTER_SNOC_GC_MEM_NOC 42
#define QCS615_MASTER_SNOC_SF_MEM_NOC 43
#define QCS615_MASTER_SPDM 44
#define QCS615_MASTER_SYS_TCU 45
#define QCS615_MASTER_UFS_MEM 46
#define QCS615_MASTER_USB2 47
#define QCS615_MASTER_USB3_0 48
#define QCS615_MASTER_VIDEO_P0 49
#define QCS615_MASTER_VIDEO_PROC 50
#define QCS615_SLAVE_A1NOC_CFG 51
#define QCS615_SLAVE_A1NOC_SNOC 52
#define QCS615_SLAVE_AHB2PHY_EAST 53
#define QCS615_SLAVE_AHB2PHY_WEST 54
#define QCS615_SLAVE_ANOC_PCIE_SNOC 55
#define QCS615_SLAVE_AOP 56
#define QCS615_SLAVE_AOSS 57
#define QCS615_SLAVE_APPSS 58
#define QCS615_SLAVE_CAMERA_CFG 59
#define QCS615_SLAVE_CAMNOC_UNCOMP 60
#define QCS615_SLAVE_CLK_CTL 61
#define QCS615_SLAVE_CNOC_A2NOC 62
#define QCS615_SLAVE_CNOC_DDRSS 63
#define QCS615_SLAVE_CNOC_MNOC_CFG 64
#define QCS615_SLAVE_CRYPTO_0_CFG 65
#define QCS615_SLAVE_DC_NOC_GEMNOC 66
#define QCS615_SLAVE_DISPLAY_CFG 67
#define QCS615_SLAVE_EBI1 68
#define QCS615_SLAVE_EMAC_AVB_CFG 69
#define QCS615_SLAVE_GEM_NOC_SNOC 70
#define QCS615_SLAVE_GFX3D_CFG 71
#define QCS615_SLAVE_GLM 72
#define QCS615_SLAVE_IMEM 73
#define QCS615_SLAVE_IMEM_CFG 74
#define QCS615_SLAVE_IPA_CFG 75
#define QCS615_SLAVE_IPA_CORE 76
#define QCS615_SLAVE_LLCC 77
#define QCS615_SLAVE_LLCC_CFG 78
#define QCS615_SLAVE_LPASS_SNOC 79
#define QCS615_SLAVE_MEM_NOC_PCIE_SNOC 80
#define QCS615_SLAVE_MNOC_HF_MEM_NOC 81
#define QCS615_SLAVE_MNOC_SF_MEM_NOC 82
#define QCS615_SLAVE_MSS_PROC_MS_MPU_CFG 83
#define QCS615_SLAVE_PCIE_0 84
#define QCS615_SLAVE_PCIE_CFG 85
#define QCS615_SLAVE_PIMEM 86
#define QCS615_SLAVE_PIMEM_CFG 87
#define QCS615_SLAVE_PRNG 88
#define QCS615_SLAVE_QDSS_CFG 89
#define QCS615_SLAVE_QDSS_STM 90
#define QCS615_SLAVE_QSPI 91
#define QCS615_SLAVE_QUP_0 92
#define QCS615_SLAVE_QUP_1 93
#define QCS615_SLAVE_RBCPR_CX_CFG 94
#define QCS615_SLAVE_RBCPR_MX_CFG 95
#define QCS615_SLAVE_SDCC_1 96
#define QCS615_SLAVE_SDCC_2 97
#define QCS615_SLAVE_SERVICE_A2NOC 98
#define QCS615_SLAVE_SERVICE_CNOC 99
#define QCS615_SLAVE_SERVICE_GEM_NOC 100
#define QCS615_SLAVE_SERVICE_MNOC 101
#define QCS615_SLAVE_SERVICE_SNOC 102
#define QCS615_SLAVE_SNOC_CFG 103
#define QCS615_SLAVE_SNOC_CNOC 104
#define QCS615_SLAVE_SNOC_GEM_NOC_SF 105
#define QCS615_SLAVE_SNOC_MEM_NOC_GC 106
#define QCS615_SLAVE_SPDM_WRAPPER 107
#define QCS615_SLAVE_TCSR 108
#define QCS615_SLAVE_TCU 109
#define QCS615_SLAVE_TLMM_EAST 110
#define QCS615_SLAVE_TLMM_SOUTH 111
#define QCS615_SLAVE_TLMM_WEST 112
#define QCS615_SLAVE_UFS_MEM_CFG 113
#define QCS615_SLAVE_USB2 114
#define QCS615_SLAVE_USB3 115
#define QCS615_SLAVE_VENUS_CFG 116
#define QCS615_SLAVE_VSENSE_CTRL_CFG 117
#endif

2088
drivers/interconnect/qcom/qcs8300.c Normal file
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File diff suppressed because it is too large Load Diff

177
drivers/interconnect/qcom/qcs8300.h Normal file
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@ -0,0 +1,177 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DRIVERS_INTERCONNECT_QCOM_QCS8300_H
#define __DRIVERS_INTERCONNECT_QCOM_QCS8300_H
#define QCS8300_MASTER_GPU_TCU 0
#define QCS8300_MASTER_PCIE_TCU 1
#define QCS8300_MASTER_SYS_TCU 2
#define QCS8300_MASTER_APPSS_PROC 3
#define QCS8300_MASTER_LLCC 4
#define QCS8300_MASTER_CNOC_LPASS_AG_NOC 5
#define QCS8300_MASTER_GIC_AHB 6
#define QCS8300_MASTER_CDSP_NOC_CFG 7
#define QCS8300_MASTER_QDSS_BAM 8
#define QCS8300_MASTER_QUP_0 9
#define QCS8300_MASTER_QUP_1 10
#define QCS8300_MASTER_A1NOC_SNOC 11
#define QCS8300_MASTER_A2NOC_SNOC 12
#define QCS8300_MASTER_CAMNOC_HF 13
#define QCS8300_MASTER_CAMNOC_ICP 14
#define QCS8300_MASTER_CAMNOC_SF 15
#define QCS8300_MASTER_COMPUTE_NOC 16
#define QCS8300_MASTER_CNOC_A2NOC 17
#define QCS8300_MASTER_CNOC_DC_NOC 18
#define QCS8300_MASTER_GEM_NOC_CFG 19
#define QCS8300_MASTER_GEM_NOC_CNOC 20
#define QCS8300_MASTER_GEM_NOC_PCIE_SNOC 21
#define QCS8300_MASTER_GPDSP_SAIL 22
#define QCS8300_MASTER_GFX3D 23
#define QCS8300_MASTER_LPASS_ANOC 24
#define QCS8300_MASTER_MDP0 25
#define QCS8300_MASTER_MDP1 26
#define QCS8300_MASTER_MNOC_HF_MEM_NOC 27
#define QCS8300_MASTER_CNOC_MNOC_HF_CFG 28
#define QCS8300_MASTER_MNOC_SF_MEM_NOC 29
#define QCS8300_MASTER_CNOC_MNOC_SF_CFG 30
#define QCS8300_MASTER_ANOC_PCIE_GEM_NOC 31
#define QCS8300_MASTER_SAILSS_MD0 32
#define QCS8300_MASTER_SNOC_CFG 33
#define QCS8300_MASTER_SNOC_GC_MEM_NOC 34
#define QCS8300_MASTER_SNOC_SF_MEM_NOC 35
#define QCS8300_MASTER_VIDEO_P0 36
#define QCS8300_MASTER_VIDEO_PROC 37
#define QCS8300_MASTER_VIDEO_V_PROC 38
#define QCS8300_MASTER_QUP_CORE_0 39
#define QCS8300_MASTER_QUP_CORE_1 40
#define QCS8300_MASTER_QUP_CORE_3 41
#define QCS8300_MASTER_CRYPTO_CORE0 42
#define QCS8300_MASTER_CRYPTO_CORE1 43
#define QCS8300_MASTER_DSP0 44
#define QCS8300_MASTER_IPA 45
#define QCS8300_MASTER_LPASS_PROC 46
#define QCS8300_MASTER_CDSP_PROC 47
#define QCS8300_MASTER_PIMEM 48
#define QCS8300_MASTER_QUP_3 49
#define QCS8300_MASTER_EMAC 50
#define QCS8300_MASTER_GIC 51
#define QCS8300_MASTER_PCIE_0 52
#define QCS8300_MASTER_PCIE_1 53
#define QCS8300_MASTER_QDSS_ETR_0 54
#define QCS8300_MASTER_QDSS_ETR_1 55
#define QCS8300_MASTER_SDC 56
#define QCS8300_MASTER_UFS_MEM 57
#define QCS8300_MASTER_USB2 58
#define QCS8300_MASTER_USB3_0 59
#define QCS8300_SLAVE_EBI1 60
#define QCS8300_SLAVE_AHB2PHY_2 61
#define QCS8300_SLAVE_AHB2PHY_3 62
#define QCS8300_SLAVE_ANOC_THROTTLE_CFG 63
#define QCS8300_SLAVE_AOSS 64
#define QCS8300_SLAVE_APPSS 65
#define QCS8300_SLAVE_BOOT_ROM 66
#define QCS8300_SLAVE_CAMERA_CFG 67
#define QCS8300_SLAVE_CAMERA_NRT_THROTTLE_CFG 68
#define QCS8300_SLAVE_CAMERA_RT_THROTTLE_CFG 69
#define QCS8300_SLAVE_CLK_CTL 70
#define QCS8300_SLAVE_CDSP_CFG 71
#define QCS8300_SLAVE_RBCPR_CX_CFG 72
#define QCS8300_SLAVE_RBCPR_MMCX_CFG 73
#define QCS8300_SLAVE_RBCPR_MX_CFG 74
#define QCS8300_SLAVE_CPR_NSPCX 75
#define QCS8300_SLAVE_CPR_NSPHMX 76
#define QCS8300_SLAVE_CRYPTO_0_CFG 77
#define QCS8300_SLAVE_CX_RDPM 78
#define QCS8300_SLAVE_DISPLAY_CFG 79
#define QCS8300_SLAVE_DISPLAY_RT_THROTTLE_CFG 80
#define QCS8300_SLAVE_EMAC_CFG 81
#define QCS8300_SLAVE_GP_DSP0_CFG 82
#define QCS8300_SLAVE_GPDSP0_THROTTLE_CFG 83
#define QCS8300_SLAVE_GPU_TCU_THROTTLE_CFG 84
#define QCS8300_SLAVE_GFX3D_CFG 85
#define QCS8300_SLAVE_HWKM 86
#define QCS8300_SLAVE_IMEM_CFG 87
#define QCS8300_SLAVE_IPA_CFG 88
#define QCS8300_SLAVE_IPC_ROUTER_CFG 89
#define QCS8300_SLAVE_LLCC_CFG 90
#define QCS8300_SLAVE_LPASS 91
#define QCS8300_SLAVE_LPASS_CORE_CFG 92
#define QCS8300_SLAVE_LPASS_LPI_CFG 93
#define QCS8300_SLAVE_LPASS_MPU_CFG 94
#define QCS8300_SLAVE_LPASS_THROTTLE_CFG 95
#define QCS8300_SLAVE_LPASS_TOP_CFG 96
#define QCS8300_SLAVE_MX_RDPM 97
#define QCS8300_SLAVE_MXC_RDPM 98
#define QCS8300_SLAVE_PCIE_0_CFG 99
#define QCS8300_SLAVE_PCIE_1_CFG 100
#define QCS8300_SLAVE_PCIE_TCU_THROTTLE_CFG 101
#define QCS8300_SLAVE_PCIE_THROTTLE_CFG 102
#define QCS8300_SLAVE_PDM 103
#define QCS8300_SLAVE_PIMEM_CFG 104
#define QCS8300_SLAVE_PKA_WRAPPER_CFG 105
#define QCS8300_SLAVE_QDSS_CFG 106
#define QCS8300_SLAVE_QM_CFG 107
#define QCS8300_SLAVE_QM_MPU_CFG 108
#define QCS8300_SLAVE_QUP_0 109
#define QCS8300_SLAVE_QUP_1 110
#define QCS8300_SLAVE_QUP_3 111
#define QCS8300_SLAVE_SAIL_THROTTLE_CFG 112
#define QCS8300_SLAVE_SDC1 113
#define QCS8300_SLAVE_SECURITY 114
#define QCS8300_SLAVE_SNOC_THROTTLE_CFG 115
#define QCS8300_SLAVE_TCSR 116
#define QCS8300_SLAVE_TLMM 117
#define QCS8300_SLAVE_TSC_CFG 118
#define QCS8300_SLAVE_UFS_MEM_CFG 119
#define QCS8300_SLAVE_USB2 120
#define QCS8300_SLAVE_USB3_0 121
#define QCS8300_SLAVE_VENUS_CFG 122
#define QCS8300_SLAVE_VENUS_CVP_THROTTLE_CFG 123
#define QCS8300_SLAVE_VENUS_V_CPU_THROTTLE_CFG 124
#define QCS8300_SLAVE_VENUS_VCODEC_THROTTLE_CFG 125
#define QCS8300_SLAVE_A1NOC_SNOC 126
#define QCS8300_SLAVE_A2NOC_SNOC 127
#define QCS8300_SLAVE_DDRSS_CFG 128
#define QCS8300_SLAVE_GEM_NOC_CNOC 129
#define QCS8300_SLAVE_GEM_NOC_CFG 130
#define QCS8300_SLAVE_SNOC_GEM_NOC_GC 131
#define QCS8300_SLAVE_SNOC_GEM_NOC_SF 132
#define QCS8300_SLAVE_GP_DSP_SAIL_NOC 133
#define QCS8300_SLAVE_GPDSP_NOC_CFG 134
#define QCS8300_SLAVE_HCP_A 135
#define QCS8300_SLAVE_LLCC 136
#define QCS8300_SLAVE_MNOC_HF_MEM_NOC 137
#define QCS8300_SLAVE_MNOC_SF_MEM_NOC 138
#define QCS8300_SLAVE_CNOC_MNOC_HF_CFG 139
#define QCS8300_SLAVE_CNOC_MNOC_SF_CFG 140
#define QCS8300_SLAVE_CDSP_MEM_NOC 141
#define QCS8300_SLAVE_GEM_NOC_PCIE_CNOC 142
#define QCS8300_SLAVE_PCIE_ANOC_CFG 143
#define QCS8300_SLAVE_ANOC_PCIE_GEM_NOC 144
#define QCS8300_SLAVE_SNOC_CFG 145
#define QCS8300_SLAVE_LPASS_SNOC 146
#define QCS8300_SLAVE_QUP_CORE_0 147
#define QCS8300_SLAVE_QUP_CORE_1 148
#define QCS8300_SLAVE_QUP_CORE_3 149
#define QCS8300_SLAVE_BOOT_IMEM 150
#define QCS8300_SLAVE_IMEM 151
#define QCS8300_SLAVE_PIMEM 152
#define QCS8300_SLAVE_SERVICE_NSP_NOC 153
#define QCS8300_SLAVE_SERVICE_GEM_NOC_1 154
#define QCS8300_SLAVE_SERVICE_MNOC_HF 155
#define QCS8300_SLAVE_SERVICE_MNOC_SF 156
#define QCS8300_SLAVE_SERVICES_LPASS_AML_NOC 157
#define QCS8300_SLAVE_SERVICE_LPASS_AG_NOC 158
#define QCS8300_SLAVE_SERVICE_GEM_NOC_2 159
#define QCS8300_SLAVE_SERVICE_SNOC 160
#define QCS8300_SLAVE_SERVICE_GEM_NOC 161
#define QCS8300_SLAVE_SERVICE_GEM_NOC2 162
#define QCS8300_SLAVE_PCIE_0 163
#define QCS8300_SLAVE_PCIE_1 164
#define QCS8300_SLAVE_QDSS_STM 165
#define QCS8300_SLAVE_TCU 166
#endif

2
drivers/interconnect/qcom/qdu1000.c
View File

@ -1046,7 +1046,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qnoc_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-qdu1000",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sa8775p.c
View File

@ -2519,7 +2519,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sa8775p",
.of_match_table = qnoc_of_match,

1930
drivers/interconnect/qcom/sar2130p.c Normal file
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File diff suppressed because it is too large Load Diff

2
drivers/interconnect/qcom/sc7180.c
View File

@ -1807,7 +1807,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc7180",
.of_match_table = qnoc_of_match,

6
drivers/interconnect/qcom/sc7280.c
View File

@ -1691,7 +1691,7 @@ static const struct qcom_icc_desc sc7280_aggre1_noc = {
.num_nodes = ARRAY_SIZE(aggre1_noc_nodes),
.bcms = aggre1_noc_bcms,
.num_bcms = ARRAY_SIZE(aggre1_noc_bcms),
.qos_clks_required = true,
.qos_requires_clocks = true,
};
static struct qcom_icc_bcm * const aggre2_noc_bcms[] = {
@ -1723,7 +1723,7 @@ static const struct qcom_icc_desc sc7280_aggre2_noc = {
.num_nodes = ARRAY_SIZE(aggre2_noc_nodes),
.bcms = aggre2_noc_bcms,
.num_bcms = ARRAY_SIZE(aggre2_noc_bcms),
.qos_clks_required = true,
.qos_requires_clocks = true,
};
static struct qcom_icc_bcm * const clk_virt_bcms[] = {
@ -2111,7 +2111,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc7280",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sc8180x.c
View File

@ -1889,7 +1889,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc8180x",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sc8280xp.c
View File

@ -2391,7 +2391,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc8280xp",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sdm660.c
View File

@ -1714,7 +1714,7 @@ MODULE_DEVICE_TABLE(of, sdm660_noc_of_match);
static struct platform_driver sdm660_noc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-sdm660",
.of_match_table = sdm660_noc_of_match,

2
drivers/interconnect/qcom/sdm670.c
View File

@ -1533,7 +1533,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdm670",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sdm845.c
View File

@ -1802,7 +1802,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdm845",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sdx55.c
View File

@ -913,7 +913,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdx55",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sdx65.c
View File

@ -897,7 +897,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdx65",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sdx75.c
View File

@ -1083,7 +1083,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdx75",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm6115.c
View File

@ -1402,7 +1402,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qnoc_probe,
.remove_new = qnoc_remove,
.remove = qnoc_remove,
.driver = {
.name = "qnoc-sm6115",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm6350.c
View File

@ -1702,7 +1702,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm6350",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm7150.c
View File

@ -1730,7 +1730,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm7150",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm8150.c
View File

@ -1864,7 +1864,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8150",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm8250.c
View File

@ -1991,7 +1991,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8250",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm8350.c
View File

@ -1807,7 +1807,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8350",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm8450.c
View File

@ -1884,7 +1884,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8450",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm8550.c
View File

@ -1645,7 +1645,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8550",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/sm8650.c
View File

@ -1650,7 +1650,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8650",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/qcom/smd-rpm.c
View File

@ -85,7 +85,7 @@ static struct platform_driver qcom_interconnect_rpm_smd_driver = {
.name = "icc_smd_rpm",
},
.probe = qcom_icc_rpm_smd_probe,
.remove_new = qcom_icc_rpm_smd_remove,
.remove = qcom_icc_rpm_smd_remove,
};
module_platform_driver(qcom_interconnect_rpm_smd_driver);
MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>");

2
drivers/interconnect/qcom/x1e80100.c
View File

@ -1964,7 +1964,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove_new = qcom_icc_rpmh_remove,
.remove = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-x1e80100",
.of_match_table = qnoc_of_match,

2
drivers/interconnect/samsung/exynos.c
View File

@ -180,7 +180,7 @@ static struct platform_driver exynos_generic_icc_driver = {
.sync_state = icc_sync_state,
},
.probe = exynos_generic_icc_probe,
.remove_new = exynos_generic_icc_remove,
.remove = exynos_generic_icc_remove,
};
module_platform_driver(exynos_generic_icc_driver);

136
include/dt-bindings/interconnect/qcom,qcs615-rpmh.h Normal file
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@ -0,0 +1,136 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS615_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_QCS615_H
#define MASTER_A1NOC_CFG 1
#define MASTER_QDSS_BAM 2
#define MASTER_QSPI 3
#define MASTER_QUP_0 4
#define MASTER_BLSP_1 5
#define MASTER_CNOC_A2NOC 6
#define MASTER_CRYPTO 7
#define MASTER_IPA 8
#define MASTER_EMAC_EVB 9
#define MASTER_PCIE 10
#define MASTER_QDSS_ETR 11
#define MASTER_SDCC_1 12
#define MASTER_SDCC_2 13
#define MASTER_UFS_MEM 14
#define MASTER_USB2 15
#define MASTER_USB3_0 16
#define SLAVE_A1NOC_SNOC 17
#define SLAVE_LPASS_SNOC 18
#define SLAVE_ANOC_PCIE_SNOC 19
#define SLAVE_SERVICE_A2NOC 20
#define MASTER_CAMNOC_HF0_UNCOMP 1
#define MASTER_CAMNOC_HF1_UNCOMP 2
#define MASTER_CAMNOC_SF_UNCOMP 3
#define SLAVE_CAMNOC_UNCOMP 4
#define MASTER_SPDM 1
#define MASTER_SNOC_CNOC 2
#define MASTER_QDSS_DAP 3
#define SLAVE_A1NOC_CFG 4
#define SLAVE_AHB2PHY_EAST 5
#define SLAVE_AHB2PHY_WEST 6
#define SLAVE_AOP 7
#define SLAVE_AOSS 8
#define SLAVE_CAMERA_CFG 9
#define SLAVE_CLK_CTL 10
#define SLAVE_RBCPR_CX_CFG 11
#define SLAVE_RBCPR_MX_CFG 12
#define SLAVE_CRYPTO_0_CFG 13
#define SLAVE_CNOC_DDRSS 14
#define SLAVE_DISPLAY_CFG 15
#define SLAVE_EMAC_AVB_CFG 16
#define SLAVE_GLM 17
#define SLAVE_GFX3D_CFG 18
#define SLAVE_IMEM_CFG 19
#define SLAVE_IPA_CFG 20
#define SLAVE_CNOC_MNOC_CFG 21
#define SLAVE_PCIE_CFG 22
#define SLAVE_PIMEM_CFG 23
#define SLAVE_PRNG 24
#define SLAVE_QDSS_CFG 25
#define SLAVE_QSPI 26
#define SLAVE_QUP_0 27
#define SLAVE_QUP_1 28
#define SLAVE_SDCC_1 29
#define SLAVE_SDCC_2 30
#define SLAVE_SNOC_CFG 31
#define SLAVE_SPDM_WRAPPER 32
#define SLAVE_TCSR 33
#define SLAVE_TLMM_EAST 34
#define SLAVE_TLMM_SOUTH 35
#define SLAVE_TLMM_WEST 36
#define SLAVE_UFS_MEM_CFG 37
#define SLAVE_USB2 38
#define SLAVE_USB3 39
#define SLAVE_VENUS_CFG 40
#define SLAVE_VSENSE_CTRL_CFG 41
#define SLAVE_CNOC_A2NOC 42
#define SLAVE_SERVICE_CNOC 43
#define MASTER_CNOC_DC_NOC 1
#define SLAVE_DC_NOC_GEMNOC 2
#define SLAVE_LLCC_CFG 3
#define MASTER_APPSS_PROC 1
#define MASTER_GPU_TCU 2
#define MASTER_SYS_TCU 3
#define MASTER_GEM_NOC_CFG 4
#define MASTER_GFX3D 5
#define MASTER_MNOC_HF_MEM_NOC 6
#define MASTER_MNOC_SF_MEM_NOC 7
#define MASTER_SNOC_GC_MEM_NOC 8
#define MASTER_SNOC_SF_MEM_NOC 9
#define SLAVE_MSS_PROC_MS_MPU_CFG 10
#define SLAVE_GEM_NOC_SNOC 11
#define SLAVE_LLCC 12
#define SLAVE_MEM_NOC_PCIE_SNOC 13
#define SLAVE_SERVICE_GEM_NOC 14
#define MASTER_IPA_CORE 1
#define SLAVE_IPA_CORE 2
#define MASTER_LLCC 1
#define SLAVE_EBI1 2
#define MASTER_CNOC_MNOC_CFG 1
#define MASTER_CAMNOC_HF0 2
#define MASTER_CAMNOC_HF1 3
#define MASTER_CAMNOC_SF 4
#define MASTER_MDP0 5
#define MASTER_ROTATOR 6
#define MASTER_VIDEO_P0 7
#define MASTER_VIDEO_PROC 8
#define SLAVE_MNOC_SF_MEM_NOC 9
#define SLAVE_MNOC_HF_MEM_NOC 10
#define SLAVE_SERVICE_MNOC 11
#define MASTER_SNOC_CFG 1
#define MASTER_A1NOC_SNOC 2
#define MASTER_GEM_NOC_SNOC 3
#define MASTER_GEM_NOC_PCIE_SNOC 4
#define MASTER_LPASS_ANOC 5
#define MASTER_ANOC_PCIE_SNOC 6
#define MASTER_PIMEM 7
#define MASTER_GIC 8
#define SLAVE_APPSS 9
#define SLAVE_SNOC_CNOC 10
#define SLAVE_SNOC_GEM_NOC_SF 11
#define SLAVE_SNOC_MEM_NOC_GC 12
#define SLAVE_IMEM 13
#define SLAVE_PIMEM 14
#define SLAVE_SERVICE_SNOC 15
#define SLAVE_PCIE_0 16
#define SLAVE_QDSS_STM 17
#define SLAVE_TCU 18
#endif

189
include/dt-bindings/interconnect/qcom,qcs8300-rpmh.h Normal file
View File

@ -0,0 +1,189 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS8300_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_QCS8300_H
#define MASTER_QUP_3 0
#define MASTER_EMAC 1
#define MASTER_SDC 2
#define MASTER_UFS_MEM 3
#define MASTER_USB2 4
#define MASTER_USB3_0 5
#define SLAVE_A1NOC_SNOC 6
#define MASTER_QDSS_BAM 0
#define MASTER_QUP_0 1
#define MASTER_QUP_1 2
#define MASTER_CNOC_A2NOC 3
#define MASTER_CRYPTO_CORE0 4
#define MASTER_CRYPTO_CORE1 5
#define MASTER_IPA 6
#define MASTER_QDSS_ETR_0 7
#define MASTER_QDSS_ETR_1 8
#define SLAVE_A2NOC_SNOC 9
#define MASTER_QUP_CORE_0 0
#define MASTER_QUP_CORE_1 1
#define MASTER_QUP_CORE_3 2
#define SLAVE_QUP_CORE_0 3
#define SLAVE_QUP_CORE_1 4
#define SLAVE_QUP_CORE_3 5
#define MASTER_GEM_NOC_CNOC 0
#define MASTER_GEM_NOC_PCIE_SNOC 1
#define SLAVE_AHB2PHY_2 2
#define SLAVE_AHB2PHY_3 3
#define SLAVE_ANOC_THROTTLE_CFG 4
#define SLAVE_AOSS 5
#define SLAVE_APPSS 6
#define SLAVE_BOOT_ROM 7
#define SLAVE_CAMERA_CFG 8
#define SLAVE_CAMERA_NRT_THROTTLE_CFG 9
#define SLAVE_CAMERA_RT_THROTTLE_CFG 10
#define SLAVE_CLK_CTL 11
#define SLAVE_CDSP_CFG 12
#define SLAVE_RBCPR_CX_CFG 13
#define SLAVE_RBCPR_MMCX_CFG 14
#define SLAVE_RBCPR_MX_CFG 15
#define SLAVE_CPR_NSPCX 16
#define SLAVE_CPR_NSPHMX 17
#define SLAVE_CRYPTO_0_CFG 18
#define SLAVE_CX_RDPM 19
#define SLAVE_DISPLAY_CFG 20
#define SLAVE_DISPLAY_RT_THROTTLE_CFG 21
#define SLAVE_EMAC_CFG 22
#define SLAVE_GP_DSP0_CFG 23
#define SLAVE_GPDSP0_THROTTLE_CFG 24
#define SLAVE_GPU_TCU_THROTTLE_CFG 25
#define SLAVE_GFX3D_CFG 26
#define SLAVE_HWKM 27
#define SLAVE_IMEM_CFG 28
#define SLAVE_IPA_CFG 29
#define SLAVE_IPC_ROUTER_CFG 30
#define SLAVE_LPASS 31
#define SLAVE_LPASS_THROTTLE_CFG 32
#define SLAVE_MX_RDPM 33
#define SLAVE_MXC_RDPM 34
#define SLAVE_PCIE_0_CFG 35
#define SLAVE_PCIE_1_CFG 36
#define SLAVE_PCIE_TCU_THROTTLE_CFG 37
#define SLAVE_PCIE_THROTTLE_CFG 38
#define SLAVE_PDM 39
#define SLAVE_PIMEM_CFG 40
#define SLAVE_PKA_WRAPPER_CFG 41
#define SLAVE_QDSS_CFG 42
#define SLAVE_QM_CFG 43
#define SLAVE_QM_MPU_CFG 44
#define SLAVE_QUP_0 45
#define SLAVE_QUP_1 46
#define SLAVE_QUP_3 47
#define SLAVE_SAIL_THROTTLE_CFG 48
#define SLAVE_SDC1 49
#define SLAVE_SECURITY 50
#define SLAVE_SNOC_THROTTLE_CFG 51
#define SLAVE_TCSR 52
#define SLAVE_TLMM 53
#define SLAVE_TSC_CFG 54
#define SLAVE_UFS_MEM_CFG 55
#define SLAVE_USB2 56
#define SLAVE_USB3_0 57
#define SLAVE_VENUS_CFG 58
#define SLAVE_VENUS_CVP_THROTTLE_CFG 59
#define SLAVE_VENUS_V_CPU_THROTTLE_CFG 60
#define SLAVE_VENUS_VCODEC_THROTTLE_CFG 61
#define SLAVE_DDRSS_CFG 62
#define SLAVE_GPDSP_NOC_CFG 63
#define SLAVE_CNOC_MNOC_HF_CFG 64
#define SLAVE_CNOC_MNOC_SF_CFG 65
#define SLAVE_PCIE_ANOC_CFG 66
#define SLAVE_SNOC_CFG 67
#define SLAVE_BOOT_IMEM 68
#define SLAVE_IMEM 69
#define SLAVE_PIMEM 70
#define SLAVE_PCIE_0 71
#define SLAVE_PCIE_1 72
#define SLAVE_QDSS_STM 73
#define SLAVE_TCU 74
#define MASTER_CNOC_DC_NOC 0
#define SLAVE_LLCC_CFG 1
#define SLAVE_GEM_NOC_CFG 2
#define MASTER_GPU_TCU 0
#define MASTER_PCIE_TCU 1
#define MASTER_SYS_TCU 2
#define MASTER_APPSS_PROC 3
#define MASTER_COMPUTE_NOC 4
#define MASTER_GEM_NOC_CFG 5
#define MASTER_GPDSP_SAIL 6
#define MASTER_GFX3D 7
#define MASTER_MNOC_HF_MEM_NOC 8
#define MASTER_MNOC_SF_MEM_NOC 9
#define MASTER_ANOC_PCIE_GEM_NOC 10
#define MASTER_SNOC_GC_MEM_NOC 11
#define MASTER_SNOC_SF_MEM_NOC 12
#define SLAVE_GEM_NOC_CNOC 13
#define SLAVE_LLCC 14
#define SLAVE_GEM_NOC_PCIE_CNOC 15
#define SLAVE_SERVICE_GEM_NOC_1 16
#define SLAVE_SERVICE_GEM_NOC_2 17
#define SLAVE_SERVICE_GEM_NOC 18
#define SLAVE_SERVICE_GEM_NOC2 19
#define MASTER_SAILSS_MD0 0
#define MASTER_DSP0 1
#define SLAVE_GP_DSP_SAIL_NOC 2
#define MASTER_CNOC_LPASS_AG_NOC 0
#define MASTER_LPASS_PROC 1
#define SLAVE_LPASS_CORE_CFG 2
#define SLAVE_LPASS_LPI_CFG 3
#define SLAVE_LPASS_MPU_CFG 4
#define SLAVE_LPASS_TOP_CFG 5
#define SLAVE_LPASS_SNOC 6
#define SLAVE_SERVICES_LPASS_AML_NOC 7
#define SLAVE_SERVICE_LPASS_AG_NOC 8
#define MASTER_LLCC 0
#define SLAVE_EBI1 1
#define MASTER_CAMNOC_HF 0
#define MASTER_CAMNOC_ICP 1
#define MASTER_CAMNOC_SF 2
#define MASTER_MDP0 3
#define MASTER_MDP1 4
#define MASTER_CNOC_MNOC_HF_CFG 5
#define MASTER_CNOC_MNOC_SF_CFG 6
#define MASTER_VIDEO_P0 7
#define MASTER_VIDEO_PROC 8
#define MASTER_VIDEO_V_PROC 9
#define SLAVE_MNOC_HF_MEM_NOC 10
#define SLAVE_MNOC_SF_MEM_NOC 11
#define SLAVE_SERVICE_MNOC_HF 12
#define SLAVE_SERVICE_MNOC_SF 13
#define MASTER_CDSP_NOC_CFG 0
#define MASTER_CDSP_PROC 1
#define SLAVE_HCP_A 2
#define SLAVE_CDSP_MEM_NOC 3
#define SLAVE_SERVICE_NSP_NOC 4
#define MASTER_PCIE_0 0
#define MASTER_PCIE_1 1
#define SLAVE_ANOC_PCIE_GEM_NOC 2
#define MASTER_GIC_AHB 0
#define MASTER_A1NOC_SNOC 1
#define MASTER_A2NOC_SNOC 2
#define MASTER_LPASS_ANOC 3
#define MASTER_SNOC_CFG 4
#define MASTER_PIMEM 5
#define MASTER_GIC 6
#define SLAVE_SNOC_GEM_NOC_GC 7
#define SLAVE_SNOC_GEM_NOC_SF 8
#define SLAVE_SERVICE_SNOC 9
#endif

137
include/dt-bindings/interconnect/qcom,sar2130p-rpmh.h Normal file
View File

@ -0,0 +1,137 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2024, Linaro Ltd.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SAR2130P_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_SAR2130P_H
#define MASTER_QUP_CORE_0 0
#define MASTER_QUP_CORE_1 1
#define SLAVE_QUP_CORE_0 2
#define SLAVE_QUP_CORE_1 3
#define MASTER_GEM_NOC_CNOC 0
#define MASTER_GEM_NOC_PCIE_SNOC 1
#define MASTER_QDSS_DAP 2
#define SLAVE_AHB2PHY_SOUTH 3
#define SLAVE_AOSS 4
#define SLAVE_CAMERA_CFG 5
#define SLAVE_CLK_CTL 6
#define SLAVE_CDSP_CFG 7
#define SLAVE_RBCPR_CX_CFG 8
#define SLAVE_RBCPR_MMCX_CFG 9
#define SLAVE_RBCPR_MXA_CFG 10
#define SLAVE_RBCPR_MXC_CFG 11
#define SLAVE_CPR_NSPCX 12
#define SLAVE_CRYPTO_0_CFG 13
#define SLAVE_CX_RDPM 14
#define SLAVE_DISPLAY_CFG 15
#define SLAVE_GFX3D_CFG 16
#define SLAVE_IMEM_CFG 17
#define SLAVE_IPC_ROUTER_CFG 18
#define SLAVE_LPASS 19
#define SLAVE_MX_RDPM 20
#define SLAVE_PCIE_0_CFG 21
#define SLAVE_PCIE_1_CFG 22
#define SLAVE_PDM 23
#define SLAVE_PIMEM_CFG 24
#define SLAVE_PRNG 25
#define SLAVE_QDSS_CFG 26
#define SLAVE_QSPI_0 27
#define SLAVE_QUP_0 28
#define SLAVE_QUP_1 29
#define SLAVE_SDCC_1 30
#define SLAVE_TCSR 31
#define SLAVE_TLMM 32
#define SLAVE_TME_CFG 33
#define SLAVE_USB3_0 34
#define SLAVE_VENUS_CFG 35
#define SLAVE_VSENSE_CTRL_CFG 36
#define SLAVE_WLAN_Q6_CFG 37
#define SLAVE_DDRSS_CFG 38
#define SLAVE_CNOC_MNOC_CFG 39
#define SLAVE_SNOC_CFG 40
#define SLAVE_IMEM 41
#define SLAVE_PIMEM 42
#define SLAVE_SERVICE_CNOC 43
#define SLAVE_PCIE_0 44
#define SLAVE_PCIE_1 45
#define SLAVE_QDSS_STM 46
#define SLAVE_TCU 47
#define MASTER_GPU_TCU 0
#define MASTER_SYS_TCU 1
#define MASTER_APPSS_PROC 2
#define MASTER_GFX3D 3
#define MASTER_MNOC_HF_MEM_NOC 4
#define MASTER_MNOC_SF_MEM_NOC 5
#define MASTER_COMPUTE_NOC 6
#define MASTER_ANOC_PCIE_GEM_NOC 7
#define MASTER_SNOC_GC_MEM_NOC 8
#define MASTER_SNOC_SF_MEM_NOC 9
#define MASTER_WLAN_Q6 10
#define SLAVE_GEM_NOC_CNOC 11
#define SLAVE_LLCC 12
#define SLAVE_MEM_NOC_PCIE_SNOC 13
#define MASTER_CNOC_LPASS_AG_NOC 0
#define MASTER_LPASS_PROC 1
#define SLAVE_LPASS_CORE_CFG 2
#define SLAVE_LPASS_LPI_CFG 3
#define SLAVE_LPASS_MPU_CFG 4
#define SLAVE_LPASS_TOP_CFG 5
#define SLAVE_LPASS_SNOC 6
#define SLAVE_SERVICES_LPASS_AML_NOC 7
#define SLAVE_SERVICE_LPASS_AG_NOC 8
#define MASTER_LLCC 0
#define SLAVE_EBI1 1
#define MASTER_CAMNOC_HF 0
#define MASTER_CAMNOC_ICP 1
#define MASTER_CAMNOC_SF 2
#define MASTER_LSR 3
#define MASTER_MDP 4
#define MASTER_CNOC_MNOC_CFG 5
#define MASTER_VIDEO 6
#define MASTER_VIDEO_CV_PROC 7
#define MASTER_VIDEO_PROC 8
#define MASTER_VIDEO_V_PROC 9
#define SLAVE_MNOC_HF_MEM_NOC 10
#define SLAVE_MNOC_SF_MEM_NOC 11
#define SLAVE_SERVICE_MNOC 12
#define MASTER_CDSP_NOC_CFG 0
#define MASTER_CDSP_PROC 1
#define SLAVE_CDSP_MEM_NOC 2
#define SLAVE_SERVICE_NSP_NOC 3
#define MASTER_PCIE_0 0
#define MASTER_PCIE_1 1
#define SLAVE_ANOC_PCIE_GEM_NOC 2
#define MASTER_GIC_AHB 0
#define MASTER_QDSS_BAM 1
#define MASTER_QSPI_0 2
#define MASTER_QUP_0 3
#define MASTER_QUP_1 4
#define MASTER_A2NOC_SNOC 5
#define MASTER_CNOC_DATAPATH 6
#define MASTER_LPASS_ANOC 7
#define MASTER_SNOC_CFG 8
#define MASTER_CRYPTO 9
#define MASTER_PIMEM 10
#define MASTER_GIC 11
#define MASTER_QDSS_ETR 12
#define MASTER_QDSS_ETR_1 13
#define MASTER_SDCC_1 14
#define MASTER_USB3_0 15
#define SLAVE_A2NOC_SNOC 16
#define SLAVE_SNOC_GEM_NOC_GC 17
#define SLAVE_SNOC_GEM_NOC_SF 18
#define SLAVE_SERVICE_SNOC 19
#endif