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clk: sunxi: Add USB clock register defintions

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Add register definitions for the usb-clk register found on sun4i, sun5i and
sun7i SoCs.

Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
This commit is contained in:
Roman Byshko 2014-02-07 16:21:50 +01:00 committed by Emilio López
parent cfb0086dca
commit 5abdbf2f49
2 changed files with 17 additions and 0 deletions
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5
Documentation/devicetree/bindings/clock/sunxi.txt
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@ -37,6 +37,8 @@ Required properties:
"allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31 "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
"allwinner,sun4i-mod0-clk" - for the module 0 family of clocks "allwinner,sun4i-mod0-clk" - for the module 0 family of clocks
"allwinner,sun7i-a20-out-clk" - for the external output clocks "allwinner,sun7i-a20-out-clk" - for the external output clocks
"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
Required properties for all clocks: Required properties for all clocks:
- reg : shall be the control register address for the clock. - reg : shall be the control register address for the clock.
@ -50,6 +52,9 @@ Required properties for all clocks:
If the clock module only has one output, the name shall be the If the clock module only has one output, the name shall be the
module name. module name.
And "allwinner,*-usb-clk" clocks also require:
- reset-cells : shall be set to 1
Clock consumers should specify the desired clocks they use with a Clock consumers should specify the desired clocks they use with a
"clocks" phandle cell. Consumers that are using a gated clock should "clocks" phandle cell. Consumers that are using a gated clock should
provide an additional ID in their clock property. This ID is the provide an additional ID in their clock property. This ID is the

12
drivers/clk/sunxi/clk-sunxi.c
View File

@ -816,6 +816,16 @@ static const struct gates_data sun7i_a20_apb1_gates_data __initconst = {
.mask = { 0xff80ff }, .mask = { 0xff80ff },
}; };
static const struct gates_data sun4i_a10_usb_gates_data __initconst = {
.mask = {0x1C0},
.reset_mask = 0x07,
};
static const struct gates_data sun5i_a13_usb_gates_data __initconst = {
.mask = {0x140},
.reset_mask = 0x03,
};
static void __init sunxi_gates_clk_setup(struct device_node *node, static void __init sunxi_gates_clk_setup(struct device_node *node,
struct gates_data *data) struct gates_data *data)
{ {
@ -1107,6 +1117,8 @@ static const struct of_device_id clk_gates_match[] __initconst = {
{.compatible = "allwinner,sun6i-a31-apb1-gates-clk", .data = &sun6i_a31_apb1_gates_data,}, {.compatible = "allwinner,sun6i-a31-apb1-gates-clk", .data = &sun6i_a31_apb1_gates_data,},
{.compatible = "allwinner,sun7i-a20-apb1-gates-clk", .data = &sun7i_a20_apb1_gates_data,}, {.compatible = "allwinner,sun7i-a20-apb1-gates-clk", .data = &sun7i_a20_apb1_gates_data,},
{.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,}, {.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,},
{.compatible = "allwinner,sun4i-a10-usb-clk", .data = &sun4i_a10_usb_gates_data,},
{.compatible = "allwinner,sun5i-a13-usb-clk", .data = &sun5i_a13_usb_gates_data,},
{} {}
}; };