mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-01-07 22:03:14 +00:00
More pwm, i2s and i2c nodes for the RV1126 soc.
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This commit is contained in:
Arnd Bergmann
commit
611347bb0e
@ -97,6 +97,156 @@ i2c2_xfer: i2c2-xfer {
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<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
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};
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};
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i2c3 {
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/omit-if-no-ref/
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i2c3m0_xfer: i2c3m0-xfer {
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rockchip,pins =
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/* i2c3_scl_m0 */
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<3 RK_PA4 5 &pcfg_pull_none>,
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/* i2c3_sda_m0 */
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<3 RK_PA5 5 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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i2c3m1_xfer: i2c3m1-xfer {
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rockchip,pins =
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/* i2c3_scl_m1 */
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<2 RK_PD4 7 &pcfg_pull_none>,
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/* i2c3_sda_m1 */
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<2 RK_PD5 7 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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i2c3m2_xfer: i2c3m2-xfer {
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rockchip,pins =
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/* i2c3_scl_m2 */
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<1 RK_PD6 3 &pcfg_pull_none>,
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/* i2c3_sda_m2 */
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<1 RK_PD7 3 &pcfg_pull_none>;
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};
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};
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i2s0 {
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i2s0m0_lrck_tx: i2s0m0-lrck-tx {
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rockchip,pins =
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/* i2s0_lrck_tx_m0 */
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<3 RK_PD3 1 &pcfg_pull_none>;
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};
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i2s0m0_lrck_rx: i2s0m0-lrck-rx {
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rockchip,pins =
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/* i2s0_lrck_rx_m0 */
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<3 RK_PD4 1 &pcfg_pull_none>;
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};
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i2s0m0_mclk: i2s0m0-mclk {
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rockchip,pins =
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/* i2s0_mclk_m0 */
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<3 RK_PD2 1 &pcfg_pull_none>;
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};
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i2s0m0_sclk_rx: i2s0m0-sclk-rx {
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rockchip,pins =
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/* i2s0_sclk_rx_m0 */
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<3 RK_PD1 1 &pcfg_pull_none>;
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};
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i2s0m0_sclk_tx: i2s0m0-sclk-tx {
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rockchip,pins =
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/* i2s0_sclk_tx_m0 */
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<3 RK_PD0 1 &pcfg_pull_none>;
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};
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i2s0m0_sdi0: i2s0m0-sdi0 {
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rockchip,pins =
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/* i2s0_sdi0_m0 */
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<3 RK_PD6 1 &pcfg_pull_none>;
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};
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i2s0m0_sdo0: i2s0m0-sdo0 {
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rockchip,pins =
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/* i2s0_sdo0_m0 */
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<3 RK_PD5 1 &pcfg_pull_none>;
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};
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i2s0m0_sdo1_sdi3: i2s0m0-sdo1-sdi3 {
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rockchip,pins =
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/* i2s0_sdo1_sdi3_m0 */
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<3 RK_PD7 1 &pcfg_pull_none>;
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};
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i2s0m0_sdo2_sdi2: i2s0m0-sdo2-sdi2 {
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rockchip,pins =
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/* i2s0_sdo2_sdi2_m0 */
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<4 RK_PA0 1 &pcfg_pull_none>;
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};
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i2s0m0_sdo3_sdi1: i2s0m0-sdo3-sdi1 {
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rockchip,pins =
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/* i2s0_sdo3_sdi1_m0 */
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<4 RK_PA1 1 &pcfg_pull_none>;
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};
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i2s0m1_lrck_tx: i2s0m1-lrck-tx {
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rockchip,pins =
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/* i2s0_lrck_tx_m1 */
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<3 RK_PA5 3 &pcfg_pull_none>;
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};
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i2s0m1_lrck_rx: i2s0m1-lrck-rx {
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rockchip,pins =
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/* i2s0_lrck_rx_m1 */
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<3 RK_PB2 3 &pcfg_pull_none>;
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};
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i2s0m1_mclk: i2s0m1-mclk {
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rockchip,pins =
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/* i2s0_mclk_m1 */
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<3 RK_PB0 3 &pcfg_pull_none>;
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};
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i2s0m1_sclk_rx: i2s0m1-sclk-rx {
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rockchip,pins =
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/* i2s0_sclk_rx_m1 */
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<3 RK_PB1 3 &pcfg_pull_none>;
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};
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i2s0m1_sclk_tx: i2s0m1-sclk-tx {
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rockchip,pins =
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/* i2s0_sclk_tx_m1 */
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<3 RK_PA4 3 &pcfg_pull_none>;
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};
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i2s0m1_sdi0: i2s0m1-sdi0 {
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rockchip,pins =
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/* i2s0_sdi0_m1 */
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<3 RK_PA7 3 &pcfg_pull_none>;
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};
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i2s0m1_sdo0: i2s0m1-sdo0 {
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rockchip,pins =
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/* i2s0_sdo0_m1 */
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<3 RK_PA6 3 &pcfg_pull_none>;
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};
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i2s0m1_sdo1_sdi3: i2s0m1-sdo1-sdi3 {
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rockchip,pins =
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/* i2s0_sdo1_sdi3_m1 */
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<3 RK_PB3 3 &pcfg_pull_none>;
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};
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i2s0m1_sdo2_sdi2: i2s0m1-sdo2-sdi2 {
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rockchip,pins =
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/* i2s0_sdo2_sdi2_m1 */
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<3 RK_PB4 3 &pcfg_pull_none>;
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};
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i2s0m1_sdo3_sdi1: i2s0m1-sdo3-sdi1 {
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rockchip,pins =
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/* i2s0_sdo3_sdi1_m1 */
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<3 RK_PB5 3 &pcfg_pull_none>;
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};
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};
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pwm0 {
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/omit-if-no-ref/
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pwm0m0_pins: pwm0m0-pins {
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rockchip,pins =
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/* pwm0_pin_m0 */
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<0 RK_PB6 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm0m1_pins: pwm0m1-pins {
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rockchip,pins =
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/* pwm0_pin_m1 */
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<2 RK_PB3 5 &pcfg_pull_none>;
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};
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};
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pwm1 {
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/omit-if-no-ref/
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pwm1m0_pins: pwm1m0-pins {
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rockchip,pins =
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/* pwm1_pin_m0 */
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<0 RK_PB7 3 &pcfg_pull_none>;
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};
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};
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pwm2 {
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/omit-if-no-ref/
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pwm2m0_pins: pwm2m0-pins {
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@ -104,6 +254,106 @@ pwm2m0_pins: pwm2m0-pins {
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/* pwm2_pin_m0 */
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<0 RK_PC0 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm2m1_pins: pwm2m1-pins {
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rockchip,pins =
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/* pwm2_pin_m1 */
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<2 RK_PB1 5 &pcfg_pull_none>;
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};
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};
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pwm3 {
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/omit-if-no-ref/
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pwm3m0_pins: pwm3m0-pins {
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rockchip,pins =
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/* pwm3_pin_m0 */
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<0 RK_PC1 3 &pcfg_pull_none>;
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};
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};
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pwm4 {
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/omit-if-no-ref/
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pwm4m0_pins: pwm4m0-pins {
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rockchip,pins =
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/* pwm4_pin_m0 */
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<0 RK_PC2 3 &pcfg_pull_none>;
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};
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};
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pwm5 {
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/omit-if-no-ref/
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pwm5m0_pins: pwm5m0-pins {
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rockchip,pins =
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/* pwm5_pin_m0 */
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<0 RK_PC3 3 &pcfg_pull_none>;
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};
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};
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pwm6 {
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/omit-if-no-ref/
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pwm6m0_pins: pwm6m0-pins {
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rockchip,pins =
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/* pwm6_pin_m0 */
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<0 RK_PB2 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm6m1_pins: pwm6m1-pins {
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rockchip,pins =
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/* pwm6_pin_m1 */
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<2 RK_PD4 5 &pcfg_pull_none>;
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};
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};
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pwm7 {
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/omit-if-no-ref/
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pwm7m0_pins: pwm7m0-pins {
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rockchip,pins =
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/* pwm7_pin_m0 */
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<0 RK_PB1 3 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm7m1_pins: pwm7m1-pins {
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rockchip,pins =
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/* pwm7_pin_m1 */
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<3 RK_PA0 5 &pcfg_pull_none>;
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};
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};
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pwm8 {
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/omit-if-no-ref/
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pwm8m0_pins: pwm8m0-pins {
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rockchip,pins =
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/* pwm8_pin_m0 */
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<3 RK_PA4 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm8m1_pins: pwm8m1-pins {
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rockchip,pins =
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/* pwm8_pin_m1 */
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<2 RK_PD7 5 &pcfg_pull_none>;
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};
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};
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pwm9 {
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/omit-if-no-ref/
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pwm9m0_pins: pwm9m0-pins {
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rockchip,pins =
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/* pwm9_pin_m0 */
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<3 RK_PA5 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm9m1_pins: pwm9m1-pins {
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rockchip,pins =
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/* pwm9_pin_m1 */
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<2 RK_PD6 5 &pcfg_pull_none>;
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};
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};
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pwm10 {
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/omit-if-no-ref/
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pwm10m0_pins: pwm10m0-pins {
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rockchip,pins =
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/* pwm10_pin_m0 */
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<3 RK_PA6 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm10m1_pins: pwm10m1-pins {
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rockchip,pins =
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/* pwm10_pin_m1 */
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<2 RK_PD5 5 &pcfg_pull_none>;
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};
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};
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pwm11 {
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/omit-if-no-ref/
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@ -112,6 +362,12 @@ pwm11m0_pins: pwm11m0-pins {
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/* pwm11_pin_m0 */
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<3 RK_PA7 6 &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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pwm11m1_pins: pwm11m1-pins {
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rockchip,pins =
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/* pwm11_pin_m1 */
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<3 RK_PA1 5 &pcfg_pull_none>;
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};
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};
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rgmii {
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/omit-if-no-ref/
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@ -22,6 +22,7 @@ / {
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aliases {
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i2c0 = &i2c0;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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@ -268,6 +269,28 @@ uart1: serial@ff410000 {
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status = "disabled";
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};
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pwm0: pwm@ff430000 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430000 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm0m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm1: pwm@ff430010 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430010 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm1m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm2: pwm@ff430020 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430020 0x10>;
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@ -279,6 +302,61 @@ pwm2: pwm@ff430020 {
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status = "disabled";
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};
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pwm3: pwm@ff430030 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff430030 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm3m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm4: pwm@ff440000 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff440000 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm4m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm5: pwm@ff440010 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff440010 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm5m0_pins>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm6: pwm@ff440020 {
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compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
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reg = <0xff440020 0x10>;
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clock-names = "pwm", "pclk";
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clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm6m0_pins>;
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#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm7: pwm@ff440030 {
|
||||
compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
|
||||
reg = <0xff440030 0x10>;
|
||||
clock-names = "pwm", "pclk";
|
||||
clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm7m0_pins>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pmucru: clock-controller@ff480000 {
|
||||
compatible = "rockchip,rv1126-pmucru";
|
||||
reg = <0xff480000 0x1000>;
|
||||
@ -308,6 +386,53 @@ dmac: dma-controller@ff4e0000 {
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
i2c3: i2c@ff520000 {
|
||||
compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
|
||||
reg = <0xff520000 0x1000>;
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
|
||||
clock-names = "i2c", "pclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3m0_xfer>;
|
||||
rockchip,grf = <&pmugrf>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm8: pwm@ff550000 {
|
||||
compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
|
||||
reg = <0xff550000 0x10>;
|
||||
clock-names = "pwm", "pclk";
|
||||
clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
|
||||
pinctrl-0 = <&pwm8m0_pins>;
|
||||
pinctrl-names = "default";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm9: pwm@ff550010 {
|
||||
compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
|
||||
reg = <0xff550010 0x10>;
|
||||
clock-names = "pwm", "pclk";
|
||||
clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
|
||||
pinctrl-0 = <&pwm9m0_pins>;
|
||||
pinctrl-names = "default";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm10: pwm@ff550020 {
|
||||
compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
|
||||
reg = <0xff550020 0x10>;
|
||||
clock-names = "pwm", "pclk";
|
||||
clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
|
||||
pinctrl-0 = <&pwm10m0_pins>;
|
||||
pinctrl-names = "default";
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm11: pwm@ff550030 {
|
||||
compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
|
||||
reg = <0xff550030 0x10>;
|
||||
@ -419,6 +544,32 @@ timer0: timer@ff660000 {
|
||||
clock-names = "pclk", "timer";
|
||||
};
|
||||
|
||||
i2s0: i2s@ff800000 {
|
||||
compatible = "rockchip,rv1126-i2s-tdm";
|
||||
reg = <0xff800000 0x1000>;
|
||||
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru MCLK_I2S0_TX>, <&cru MCLK_I2S0_RX>, <&cru HCLK_I2S0>;
|
||||
clock-names = "mclk_tx", "mclk_rx", "hclk";
|
||||
dmas = <&dmac 20>, <&dmac 19>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0m0_sclk_tx>,
|
||||
<&i2s0m0_sclk_rx>,
|
||||
<&i2s0m0_mclk>,
|
||||
<&i2s0m0_lrck_tx>,
|
||||
<&i2s0m0_lrck_rx>,
|
||||
<&i2s0m0_sdi0>,
|
||||
<&i2s0m0_sdo0>,
|
||||
<&i2s0m0_sdo1_sdi3>,
|
||||
<&i2s0m0_sdo2_sdi2>,
|
||||
<&i2s0m0_sdo3_sdi1>;
|
||||
resets = <&cru SRST_I2S0_TX_M>, <&cru SRST_I2S0_RX_M>;
|
||||
reset-names = "tx-m", "rx-m";
|
||||
rockchip,grf = <&grf>;
|
||||
#sound-dai-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vop: vop@ffb00000 {
|
||||
compatible = "rockchip,rv1126-vop";
|
||||
reg = <0xffb00000 0x200>, <0xffb00a00 0x400>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user