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dt-bindings: clk: cleanup comments

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For spdx, first line /* */ for *.h, change tab to space

Replacements
devider to divider
Comunications to Communications
periphrals to peripherals
supportted to supported
wich to which
Documentatoin to Documentation

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220309222302.1114561-1-trix@redhat.com
This commit is contained in:
Tom Rix 2022-03-09 14:23:02 -08:00 committed by Rob Herring
parent b48b563626
commit 6853fece62
9 changed files with 13 additions and 14 deletions
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2
include/dt-bindings/clock/alphascale,asm9260.h
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@ -55,7 +55,7 @@
#define CLKID_AHB_I2S1 45
#define CLKID_AHB_MAC1 46
/* devider */
/* divider */
#define CLKID_SYS_CPU 47
#define CLKID_SYS_AHB 48
#define CLKID_SYS_I2S0M 49

2
include/dt-bindings/clock/axis,artpec6-clkctrl.h
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@ -2,7 +2,7 @@
/*
* ARTPEC-6 clock controller indexes
*
* Copyright 2016 Axis Comunications AB.
* Copyright 2016 Axis Communications AB.
*/
#ifndef DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H

3
include/dt-bindings/clock/boston-clock.h
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016 Imagination Technologies
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__

4
include/dt-bindings/clock/marvell,mmp2.h
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@ -32,7 +32,7 @@
#define MMP2_CLK_I2S0 31
#define MMP2_CLK_I2S1 32
/* apb periphrals */
/* apb peripherals */
#define MMP2_CLK_TWSI0 60
#define MMP2_CLK_TWSI1 61
#define MMP2_CLK_TWSI2 62
@ -60,7 +60,7 @@
#define MMP3_CLK_THERMAL2 84
#define MMP3_CLK_THERMAL3 85
/* axi periphrals */
/* axi peripherals */
#define MMP2_CLK_SDH0 101
#define MMP2_CLK_SDH1 102
#define MMP2_CLK_SDH2 103

4
include/dt-bindings/clock/marvell,pxa168.h
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@ -23,7 +23,7 @@
#define PXA168_CLK_UART_PLL 27
#define PXA168_CLK_USB_PLL 28
/* apb periphrals */
/* apb peripherals */
#define PXA168_CLK_TWSI0 60
#define PXA168_CLK_TWSI1 61
#define PXA168_CLK_TWSI2 62
@ -45,7 +45,7 @@
#define PXA168_CLK_SSP4 78
#define PXA168_CLK_TIMER 79
/* axi periphrals */
/* axi peripherals */
#define PXA168_CLK_DFC 100
#define PXA168_CLK_SDH0 101
#define PXA168_CLK_SDH1 102

4
include/dt-bindings/clock/marvell,pxa910.h
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@ -23,7 +23,7 @@
#define PXA910_CLK_UART_PLL 27
#define PXA910_CLK_USB_PLL 28
/* apb periphrals */
/* apb peripherals */
#define PXA910_CLK_TWSI0 60
#define PXA910_CLK_TWSI1 61
#define PXA910_CLK_TWSI2 62
@ -43,7 +43,7 @@
#define PXA910_CLK_TIMER0 76
#define PXA910_CLK_TIMER1 77
/* axi periphrals */
/* axi peripherals */
#define PXA910_CLK_DFC 100
#define PXA910_CLK_SDH0 101
#define PXA910_CLK_SDH1 102

2
include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Nuvoton NPCM7xx Clock Generator binding
* clock binding number for all clocks supportted by nuvoton,npcm7xx-clk
* clock binding number for all clocks supported by nuvoton,npcm7xx-clk
*
* Copyright (C) 2018 Nuvoton Technologies tali.perry@nuvoton.com
*

4
include/dt-bindings/clock/stm32fx-clock.h
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@ -7,10 +7,10 @@
*/
/*
* List of clocks wich are not derived from system clock (SYSCLOCK)
* List of clocks which are not derived from system clock (SYSCLOCK)
*
* The index of these clocks is the secondary index of DT bindings
* (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt)
* (see Documentation/devicetree/bindings/clock/st,stm32-rcc.txt)
*
* e.g:
<assigned-clocks = <&rcc 1 CLK_LSE>;

2
include/dt-bindings/clock/stratix10-clock.h
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@ -1,4 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2017, Intel Corporation
*/