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dt-bindings: clock: add SM6350 QCOM Graphics clock bindings

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Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM6350 SoCs.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222011534.3502-3-konrad.dybcio@somainline.org
This commit is contained in:
Konrad Dybcio 2022-02-22 02:15:30 +01:00 committed by Bjorn Andersson
parent 837519775f
commit 7b91b9d8cc
2 changed files with 39 additions and 0 deletions
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2
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
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@ -17,6 +17,7 @@ description: |
dt-bindings/clock/qcom,gpucc-sdm845.h
dt-bindings/clock/qcom,gpucc-sc7180.h
dt-bindings/clock/qcom,gpucc-sc7280.h
dt-bindings/clock/qcom,gpucc-sm6350.h
dt-bindings/clock/qcom,gpucc-sm8150.h
dt-bindings/clock/qcom,gpucc-sm8250.h
@ -27,6 +28,7 @@ properties:
- qcom,sc7180-gpucc
- qcom,sc7280-gpucc
- qcom,sc8180x-gpucc
- qcom,sm6350-gpucc
- qcom,sm8150-gpucc
- qcom,sm8250-gpucc

37
include/dt-bindings/clock/qcom,gpucc-sm6350.h Normal file
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@ -0,0 +1,37 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
*/
#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6350_H
#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6350_H
/* GPU_CC clocks */
#define GPU_CC_PLL0 0
#define GPU_CC_PLL1 1
#define GPU_CC_ACD_AHB_CLK 2
#define GPU_CC_ACD_CXO_CLK 3
#define GPU_CC_AHB_CLK 4
#define GPU_CC_CRC_AHB_CLK 5
#define GPU_CC_CX_GFX3D_CLK 6
#define GPU_CC_CX_GFX3D_SLV_CLK 7
#define GPU_CC_CX_GMU_CLK 8
#define GPU_CC_CX_SNOC_DVM_CLK 9
#define GPU_CC_CXO_AON_CLK 10
#define GPU_CC_CXO_CLK 11
#define GPU_CC_GMU_CLK_SRC 12
#define GPU_CC_GX_CXO_CLK 13
#define GPU_CC_GX_GFX3D_CLK 14
#define GPU_CC_GX_GFX3D_CLK_SRC 15
#define GPU_CC_GX_GMU_CLK 16
#define GPU_CC_GX_VSENSE_CLK 17
/* CLK_HW */
#define GPU_CC_CRC_DIV 0
/* GDSCs */
#define GPU_CX_GDSC 0
#define GPU_GX_GDSC 1
#endif