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ARM: dts: microchip: sama7g5: Fix RTT clock

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According to datasheet, Chapter 34. Clock Generator, section 34.2,
Embedded characteristics, source clock for RTT is the TD_SLCK, registered
with ID 1 by the slow clock controller driver. Fix RTT clock.

Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Link: https://lore.kernel.org/r/20240826165320.3068359-1-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
This commit is contained in:
Claudiu Beznea 2024-08-26 19:53:20 +03:00
parent d355c895fa
commit 867bf19232
1 changed files with 1 additions and 1 deletions
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arch/arm/boot/dts/microchip/sama7g5.dtsi
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@ -272,7 +272,7 @@ rtt: rtc@e001d020 {
compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
reg = <0xe001d020 0x30>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk32k 0>;
clocks = <&clk32k 1>;
};
clk32k: clock-controller@e001d050 {