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ARM: omap2: remove unused functions
These are a number of individual functions that were either never used, or that had their last user removed in a prior cleanup. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
parent
00a5d41ee1
commit
8e2644fff8
@ -1043,46 +1043,6 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
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pwrdm_unlock(clkdm->pwrdm.ptr);
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}
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/**
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* clkdm_in_hwsup - is clockdomain @clkdm have hardware-supervised idle enabled?
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* @clkdm: struct clockdomain *
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*
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* Returns true if clockdomain @clkdm currently has
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* hardware-supervised idle enabled, or false if it does not or if
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* @clkdm is NULL. It is only valid to call this function after
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* clkdm_init() has been called. This function does not actually read
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* bits from the hardware; it instead tests an in-memory flag that is
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* changed whenever the clockdomain code changes the auto-idle mode.
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*/
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bool clkdm_in_hwsup(struct clockdomain *clkdm)
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{
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bool ret;
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if (!clkdm)
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return false;
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ret = (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false;
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return ret;
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}
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/**
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* clkdm_missing_idle_reporting - can @clkdm enter autoidle even if in use?
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* @clkdm: struct clockdomain *
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*
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* Returns true if clockdomain @clkdm has the
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* CLKDM_MISSING_IDLE_REPORTING flag set, or false if not or @clkdm is
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* null. More information is available in the documentation for the
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* CLKDM_MISSING_IDLE_REPORTING macro.
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*/
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bool clkdm_missing_idle_reporting(struct clockdomain *clkdm)
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{
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if (!clkdm)
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return false;
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return (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) ? true : false;
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}
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/* Public autodep handling functions (deprecated) */
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/**
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@ -203,8 +203,6 @@ void clkdm_allow_idle_nolock(struct clockdomain *clkdm);
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void clkdm_allow_idle(struct clockdomain *clkdm);
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void clkdm_deny_idle_nolock(struct clockdomain *clkdm);
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void clkdm_deny_idle(struct clockdomain *clkdm);
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bool clkdm_in_hwsup(struct clockdomain *clkdm);
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bool clkdm_missing_idle_reporting(struct clockdomain *clkdm);
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int clkdm_wakeup_nolock(struct clockdomain *clkdm);
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int clkdm_wakeup(struct clockdomain *clkdm);
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@ -120,7 +120,6 @@ static inline void omap5_realtime_timer_init(void)
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void omap2420_init_early(void);
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void omap2430_init_early(void);
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void omap3430_init_early(void);
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void omap35xx_init_early(void);
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void omap3630_init_early(void);
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void omap3_init_early(void); /* Do not use this one */
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void am33xx_init_early(void);
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@ -133,8 +132,6 @@ void omap4430_init_early(void);
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void omap5_init_early(void);
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void omap3_init_late(void);
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void omap4430_init_late(void);
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void omap2420_init_late(void);
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void omap2430_init_late(void);
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void ti81xx_init_late(void);
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void am33xx_init_late(void);
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void omap5_init_late(void);
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@ -226,68 +226,7 @@ void omap3_ctrl_write_boot_mode(u8 bootmode)
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#endif
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/**
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* omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor
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* @bootaddr: physical address of the boot loader
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*
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* Set boot address for the boot loader of a supported processor
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* when a power ON sequence occurs.
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*/
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void omap_ctrl_write_dsp_boot_addr(u32 bootaddr)
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{
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u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR :
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cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR :
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cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
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soc_is_omap54xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
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0;
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if (!offset) {
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pr_err("%s: unsupported omap type\n", __func__);
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return;
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}
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omap_ctrl_writel(bootaddr, offset);
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}
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/**
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* omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor
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* @bootmode: 8-bit value to pass to some boot code
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*
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* Sets boot mode for the boot loader of a supported processor
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* when a power ON sequence occurs.
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*/
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void omap_ctrl_write_dsp_boot_mode(u8 bootmode)
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{
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u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD :
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cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD :
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0;
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if (!offset) {
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pr_err("%s: unsupported omap type\n", __func__);
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return;
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}
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omap_ctrl_writel(bootmode, offset);
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}
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#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
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/*
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* Clears the scratchpad contents in case of cold boot-
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* called during bootup
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*/
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void omap3_clear_scratchpad_contents(void)
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{
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u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET;
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void __iomem *v_addr;
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u32 offset = 0;
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v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
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if (omap3xxx_prm_clear_global_cold_reset()) {
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for ( ; offset <= max_offset; offset += 0x4)
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writel_relaxed(0x0, (v_addr + offset));
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}
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}
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/* Populate the scratchpad structure with restore structure */
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void omap3_save_scratchpad_contents(void)
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{
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@ -846,15 +785,3 @@ int __init omap_control_init(void)
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return ret;
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}
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/**
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* omap3_control_legacy_iomap_init - legacy iomap init for clock providers
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*
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* Legacy iomap init for clock provider. Needed only by legacy boot mode,
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* where the base addresses are not parsed from DT, but still required
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* by the clock driver to be setup properly.
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*/
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void __init omap3_control_legacy_iomap_init(void)
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{
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omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap2_ctrl_base);
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}
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@ -512,8 +512,6 @@ extern void omap_ctrl_writeb(u8 val, u16 offset);
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extern void omap_ctrl_writew(u16 val, u16 offset);
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extern void omap_ctrl_writel(u32 val, u16 offset);
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extern void omap3_save_scratchpad_contents(void);
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extern void omap3_clear_scratchpad_contents(void);
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extern void omap3_restore(void);
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extern void omap3_restore_es3(void);
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extern void omap3_restore_3630(void);
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@ -521,14 +519,11 @@ extern u32 omap3_arm_context[128];
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extern void omap3_control_save_context(void);
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extern void omap3_control_restore_context(void);
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extern void omap3_ctrl_write_boot_mode(u8 bootmode);
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extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
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extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
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extern void omap3630_ctrl_disable_rta(void);
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extern int omap3_ctrl_save_padconf(void);
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void omap3_ctrl_init(void);
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int omap2_control_base_init(void);
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int omap_control_init(void);
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void __init omap3_control_legacy_iomap_init(void);
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#else
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#define omap_ctrl_readb(x) 0
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#define omap_ctrl_readw(x) 0
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@ -494,12 +494,6 @@ void __init omap3430_init_early(void)
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omap_clk_soc_init = omap3430_dt_clk_init;
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}
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void __init omap35xx_init_early(void)
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{
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omap3_init_early();
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omap_clk_soc_init = omap3430_dt_clk_init;
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}
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void __init omap3630_init_early(void)
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{
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omap3_init_early();
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@ -118,11 +118,6 @@ int __init omap_secure_ram_reserve_memblock(void)
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return 0;
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}
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phys_addr_t omap_secure_ram_mempool_base(void)
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{
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return omap_secure_memblock_base;
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}
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#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
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u32 omap3_save_secure_ram(void *addr, int size)
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{
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@ -70,7 +70,6 @@ extern void omap_smccc_smc(u32 fn, u32 arg);
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extern void omap_smc1(u32 fn, u32 arg);
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extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
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extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
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extern phys_addr_t omap_secure_ram_mempool_base(void);
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extern int omap_secure_ram_reserve_memblock(void);
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extern u32 save_secure_ram_context(u32 args_pa);
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extern u32 omap3_save_secure_ram(void *save_regs, int size);
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@ -285,34 +285,6 @@ static int _omap_device_idle_hwmods(struct omap_device *od)
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/* Public functions for use by core code */
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/**
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* omap_device_get_context_loss_count - get lost context count
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* @pdev: The platform device to update.
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*
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* Using the primary hwmod, query the context loss count for this
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* device.
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*
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* Callers should consider context for this device lost any time this
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* function returns a value different than the value the caller got
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* the last time it called this function.
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*
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* If any hwmods exist for the omap_device associated with @pdev,
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* return the context loss counter for that hwmod, otherwise return
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* zero.
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*/
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int omap_device_get_context_loss_count(struct platform_device *pdev)
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{
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struct omap_device *od;
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u32 ret = 0;
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od = to_omap_device(pdev);
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if (od->hwmods_cnt)
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ret = omap_hwmod_get_context_loss_count(od->hwmods[0]);
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return ret;
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}
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/**
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* omap_device_alloc - allocate an omap_device
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* @pdev: platform_device that will be included in this omap_device
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@ -592,38 +564,6 @@ int omap_device_deassert_hardreset(struct platform_device *pdev,
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return ret;
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}
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/**
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* omap_device_get_by_hwmod_name() - convert a hwmod name to
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* device pointer.
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* @oh_name: name of the hwmod device
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*
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* Returns back a struct device * pointer associated with a hwmod
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* device represented by a hwmod_name
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*/
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struct device *omap_device_get_by_hwmod_name(const char *oh_name)
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{
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struct omap_hwmod *oh;
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if (!oh_name) {
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WARN(1, "%s: no hwmod name!\n", __func__);
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return ERR_PTR(-EINVAL);
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}
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oh = omap_hwmod_lookup(oh_name);
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if (!oh) {
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WARN(1, "%s: no hwmod for %s\n", __func__,
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oh_name);
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return ERR_PTR(-ENODEV);
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}
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if (!oh->od) {
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WARN(1, "%s: no omap_device for %s\n", __func__,
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oh_name);
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return ERR_PTR(-ENODEV);
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}
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return &oh->od->pdev->dev;
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}
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static struct notifier_block platform_nb = {
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.notifier_call = _omap_device_notifier_call,
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};
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@ -72,11 +72,6 @@ struct omap_device *omap_device_alloc(struct platform_device *pdev,
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struct omap_hwmod **ohs, int oh_cnt);
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void omap_device_delete(struct omap_device *od);
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struct device *omap_device_get_by_hwmod_name(const char *oh_name);
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/* OMAP PM interface */
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int omap_device_get_context_loss_count(struct platform_device *pdev);
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/* Other */
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int omap_device_assert_hardreset(struct platform_device *pdev,
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@ -3763,55 +3763,6 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh)
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* IP block data retrieval functions
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*/
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/**
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* omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
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* @oh: struct omap_hwmod *
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*
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* Return the powerdomain pointer associated with the OMAP module
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* @oh's main clock. If @oh does not have a main clk, return the
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* powerdomain associated with the interface clock associated with the
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* module's MPU port. (XXX Perhaps this should use the SDMA port
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* instead?) Returns NULL on error, or a struct powerdomain * on
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* success.
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*/
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struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
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{
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struct clk *c;
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struct omap_hwmod_ocp_if *oi;
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struct clockdomain *clkdm;
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struct clk_hw_omap *clk;
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struct clk_hw *hw;
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if (!oh)
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return NULL;
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if (oh->clkdm)
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return oh->clkdm->pwrdm.ptr;
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if (oh->_clk) {
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c = oh->_clk;
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} else {
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oi = _find_mpu_rt_port(oh);
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if (!oi)
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return NULL;
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c = oi->_clk;
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}
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hw = __clk_get_hw(c);
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if (!hw)
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return NULL;
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clk = to_clk_hw_omap(hw);
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if (!clk)
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return NULL;
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clkdm = clk->clkdm;
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if (!clkdm)
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return NULL;
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return clkdm->pwrdm.ptr;
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}
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/**
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* omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
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* @oh: struct omap_hwmod *
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@ -3977,32 +3928,6 @@ int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
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return ret;
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}
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/**
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* omap_hwmod_get_context_loss_count - get lost context count
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* @oh: struct omap_hwmod *
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*
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* Returns the context loss count of associated @oh
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* upon success, or zero if no context loss data is available.
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*
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* On OMAP4, this queries the per-hwmod context loss register,
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* assuming one exists. If not, or on OMAP2/3, this queries the
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* enclosing powerdomain context loss count.
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*/
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int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
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{
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struct powerdomain *pwrdm;
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int ret = 0;
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if (soc_ops.get_context_lost)
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return soc_ops.get_context_lost(oh);
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pwrdm = omap_hwmod_get_pwrdm(oh);
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if (pwrdm)
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ret = pwrdm_get_context_loss_count(pwrdm);
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return ret;
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}
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/**
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* omap_hwmod_init - initialize the hwmod code
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*
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@ -4054,18 +3979,3 @@ void __init omap_hwmod_init(void)
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inited = true;
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}
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/**
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* omap_hwmod_get_main_clk - get pointer to main clock name
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* @oh: struct omap_hwmod *
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*
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* Returns the main clock name assocated with @oh upon success,
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* or NULL if @oh is NULL.
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*/
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const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
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{
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if (!oh)
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return NULL;
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return oh->main_clk;
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}
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@ -643,7 +643,6 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
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int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
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const char *name, struct resource *res);
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struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
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void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
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int omap_hwmod_for_each_by_class(const char *classname,
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@ -652,12 +651,9 @@ int omap_hwmod_for_each_by_class(const char *classname,
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void *user);
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int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
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int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
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extern void __init omap_hwmod_init(void);
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const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
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#else /* CONFIG_OMAP_HWMOD */
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static inline int
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@ -189,12 +189,6 @@ struct omap_hwmod omap2xxx_mpu_hwmod = {
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.main_clk = "mpu_ck",
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};
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/* IVA2 */
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struct omap_hwmod omap2xxx_iva_hwmod = {
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||||
.name = "iva",
|
||||
.class = &iva_hwmod_class,
|
||||
};
|
||||
|
||||
/* timer3 */
|
||||
struct omap_hwmod omap2xxx_timer3_hwmod = {
|
||||
.name = "timer3",
|
||||
|
||||
@ -20,7 +20,6 @@ extern struct omap_hwmod omap2xxx_l3_main_hwmod;
|
||||
extern struct omap_hwmod omap2xxx_l4_core_hwmod;
|
||||
extern struct omap_hwmod omap2xxx_l4_wkup_hwmod;
|
||||
extern struct omap_hwmod omap2xxx_mpu_hwmod;
|
||||
extern struct omap_hwmod omap2xxx_iva_hwmod;
|
||||
extern struct omap_hwmod omap2xxx_timer3_hwmod;
|
||||
extern struct omap_hwmod omap2xxx_timer4_hwmod;
|
||||
extern struct omap_hwmod omap2xxx_timer5_hwmod;
|
||||
|
||||
@ -54,12 +54,6 @@ static struct omap2_oscillator oscillator = {
|
||||
.shutdown_time = ULONG_MAX,
|
||||
};
|
||||
|
||||
void omap_pm_setup_oscillator(u32 tstart, u32 tshut)
|
||||
{
|
||||
oscillator.startup_time = tstart;
|
||||
oscillator.shutdown_time = tshut;
|
||||
}
|
||||
|
||||
void omap_pm_get_oscillator(u32 *tstart, u32 *tshut)
|
||||
{
|
||||
if (!tstart || !tshut)
|
||||
|
||||
@ -142,13 +142,9 @@ static inline int omap4_cpcap_init(void)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
|
||||
extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
|
||||
extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
|
||||
#else
|
||||
static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
|
||||
static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
|
||||
static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
|
||||
@ -1148,82 +1148,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_get_context_loss_count - get powerdomain's context loss count
|
||||
* @pwrdm: struct powerdomain * to wait for
|
||||
*
|
||||
* Context loss count is the sum of powerdomain off-mode counter, the
|
||||
* logic off counter and the per-bank memory off counter. Returns negative
|
||||
* (and WARNs) upon error, otherwise, returns the context loss count.
|
||||
*/
|
||||
int pwrdm_get_context_loss_count(struct powerdomain *pwrdm)
|
||||
{
|
||||
int i, count;
|
||||
|
||||
if (!pwrdm) {
|
||||
WARN(1, "powerdomain: %s: pwrdm is null\n", __func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
count = pwrdm->state_counter[PWRDM_POWER_OFF];
|
||||
count += pwrdm->ret_logic_off_counter;
|
||||
|
||||
for (i = 0; i < pwrdm->banks; i++)
|
||||
count += pwrdm->ret_mem_off_counter[i];
|
||||
|
||||
/*
|
||||
* Context loss count has to be a non-negative value. Clear the sign
|
||||
* bit to get a value range from 0 to INT_MAX.
|
||||
*/
|
||||
count &= INT_MAX;
|
||||
|
||||
pr_debug("powerdomain: %s: context loss count = %d\n",
|
||||
pwrdm->name, count);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_can_ever_lose_context - can this powerdomain ever lose context?
|
||||
* @pwrdm: struct powerdomain *
|
||||
*
|
||||
* Given a struct powerdomain * @pwrdm, returns 1 if the powerdomain
|
||||
* can lose either memory or logic context or if @pwrdm is invalid, or
|
||||
* returns 0 otherwise. This function is not concerned with how the
|
||||
* powerdomain registers are programmed (i.e., to go off or not); it's
|
||||
* concerned with whether it's ever possible for this powerdomain to
|
||||
* go off while some other part of the chip is active. This function
|
||||
* assumes that every powerdomain can go to either ON or INACTIVE.
|
||||
*/
|
||||
bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!pwrdm) {
|
||||
pr_debug("powerdomain: %s: invalid powerdomain pointer\n",
|
||||
__func__);
|
||||
return true;
|
||||
}
|
||||
|
||||
if (pwrdm->pwrsts & PWRSTS_OFF)
|
||||
return true;
|
||||
|
||||
if (pwrdm->pwrsts & PWRSTS_RET) {
|
||||
if (pwrdm->pwrsts_logic_ret & PWRSTS_OFF)
|
||||
return true;
|
||||
|
||||
for (i = 0; i < pwrdm->banks; i++)
|
||||
if (pwrdm->pwrsts_mem_ret[i] & PWRSTS_OFF)
|
||||
return true;
|
||||
}
|
||||
|
||||
for (i = 0; i < pwrdm->banks; i++)
|
||||
if (pwrdm->pwrsts_mem_on[i] & PWRSTS_OFF)
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_save_context - save powerdomain registers
|
||||
*
|
||||
@ -1250,25 +1174,6 @@ static int pwrdm_restore_context(struct powerdomain *pwrdm, void *unused)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pwrdm_lost_power(struct powerdomain *pwrdm, void *unused)
|
||||
{
|
||||
int state;
|
||||
|
||||
/*
|
||||
* Power has been lost across all powerdomains, increment the
|
||||
* counter.
|
||||
*/
|
||||
|
||||
state = pwrdm_read_pwrst(pwrdm);
|
||||
if (state != PWRDM_POWER_OFF) {
|
||||
pwrdm->state_counter[state]++;
|
||||
pwrdm->state_counter[PWRDM_POWER_OFF]++;
|
||||
}
|
||||
pwrdm->state = state;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void pwrdms_save_context(void)
|
||||
{
|
||||
pwrdm_for_each(pwrdm_save_context, NULL);
|
||||
@ -1278,8 +1183,3 @@ void pwrdms_restore_context(void)
|
||||
{
|
||||
pwrdm_for_each(pwrdm_restore_context, NULL);
|
||||
}
|
||||
|
||||
void pwrdms_lost_power(void)
|
||||
{
|
||||
pwrdm_for_each(pwrdm_lost_power, NULL);
|
||||
}
|
||||
|
||||
@ -243,8 +243,6 @@ int pwrdm_state_switch_nolock(struct powerdomain *pwrdm);
|
||||
int pwrdm_state_switch(struct powerdomain *pwrdm);
|
||||
int pwrdm_pre_transition(struct powerdomain *pwrdm);
|
||||
int pwrdm_post_transition(struct powerdomain *pwrdm);
|
||||
int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
|
||||
bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
|
||||
|
||||
extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state);
|
||||
|
||||
@ -276,5 +274,4 @@ extern void pwrdm_unlock(struct powerdomain *pwrdm);
|
||||
extern void pwrdms_save_context(void);
|
||||
extern void pwrdms_restore_context(void);
|
||||
|
||||
extern void pwrdms_lost_power(void);
|
||||
#endif
|
||||
|
||||
@ -35,18 +35,6 @@ void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg)
|
||||
writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg));
|
||||
}
|
||||
|
||||
u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
|
||||
{
|
||||
u32 v;
|
||||
|
||||
v = omap4_prcm_mpu_read_inst_reg(inst, reg);
|
||||
v &= ~mask;
|
||||
v |= bits;
|
||||
omap4_prcm_mpu_write_inst_reg(v, inst, reg);
|
||||
|
||||
return v;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use)
|
||||
* @prcm_mpu: PRCM_MPU base virtual address
|
||||
|
||||
@ -26,8 +26,6 @@ extern struct omap_domain_base prcm_mpu_base;
|
||||
|
||||
extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
|
||||
extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
|
||||
extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
|
||||
s16 idx);
|
||||
extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu);
|
||||
#endif
|
||||
|
||||
|
||||
@ -15,7 +15,6 @@
|
||||
# ifndef __ASSEMBLER__
|
||||
extern struct omap_domain_base prm_base;
|
||||
extern u16 prm_features;
|
||||
extern void omap2_set_globals_prm(void __iomem *prm);
|
||||
int omap_prcm_init(void);
|
||||
int omap2_prm_base_init(void);
|
||||
int omap2_prcm_base_init(void);
|
||||
@ -156,12 +155,10 @@ int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
|
||||
int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
|
||||
u16 offset, u16 st_offset);
|
||||
int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
|
||||
extern u32 prm_read_reset_sources(void);
|
||||
extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
|
||||
extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
|
||||
void omap_prm_reset_system(void);
|
||||
|
||||
void omap_prm_reconfigure_io_chain(void);
|
||||
int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
|
||||
|
||||
/*
|
||||
|
||||
@ -344,41 +344,6 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap2_set_globals_prm - set the PRM base address (for early use)
|
||||
* @prm: PRM base virtual address
|
||||
*
|
||||
* XXX Will be replaced when the PRM/CM drivers are completed.
|
||||
*/
|
||||
void __init omap2_set_globals_prm(void __iomem *prm)
|
||||
{
|
||||
prm_base.va = prm;
|
||||
}
|
||||
|
||||
/**
|
||||
* prm_read_reset_sources - return the sources of the SoC's last reset
|
||||
*
|
||||
* Return a u32 bitmask representing the reset sources that caused the
|
||||
* SoC to reset. The low-level per-SoC functions called by this
|
||||
* function remap the SoC-specific reset source bits into an
|
||||
* OMAP-common set of reset source bits, defined in
|
||||
* arch/arm/mach-omap2/prm.h. Returns the standardized reset source
|
||||
* u32 bitmask from the hardware upon success, or returns (1 <<
|
||||
* OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
|
||||
* function was registered.
|
||||
*/
|
||||
u32 prm_read_reset_sources(void)
|
||||
{
|
||||
u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT;
|
||||
|
||||
if (prm_ll_data->read_reset_sources)
|
||||
ret = prm_ll_data->read_reset_sources();
|
||||
else
|
||||
WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* prm_was_any_context_lost_old - was device context lost? (old API)
|
||||
* @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
|
||||
@ -488,22 +453,6 @@ int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
|
||||
return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
|
||||
*
|
||||
* Clear any previously-latched I/O wakeup events and ensure that the
|
||||
* I/O wakeup gates are aligned with the current mux settings.
|
||||
* Calls SoC specific I/O chain reconfigure function if available,
|
||||
* otherwise does nothing.
|
||||
*/
|
||||
void omap_prm_reconfigure_io_chain(void)
|
||||
{
|
||||
if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain)
|
||||
return;
|
||||
|
||||
prcm_irq_setup->reconfigure_io_chain();
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_prm_reset_system - trigger global SW reset
|
||||
*
|
||||
|
||||
@ -60,55 +60,6 @@ void omap2_sms_restore_context(void)
|
||||
sms_write_reg(sms_context.sms_sysconfig, SMS_SYSCONFIG);
|
||||
}
|
||||
|
||||
/**
|
||||
* omap2_sdrc_get_params - return SDRC register values for a given clock rate
|
||||
* @r: SDRC clock rate (in Hz)
|
||||
* @sdrc_cs0: chip select 0 ram timings **
|
||||
* @sdrc_cs1: chip select 1 ram timings **
|
||||
*
|
||||
* Return pre-calculated values for the SDRC_ACTIM_CTRLA,
|
||||
* SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL and SDRC_MR registers in sdrc_cs[01]
|
||||
* structs,for a given SDRC clock rate 'r'.
|
||||
* These parameters control various timing delays in the SDRAM controller
|
||||
* that are expressed in terms of the number of SDRC clock cycles to
|
||||
* wait; hence the clock rate dependency.
|
||||
*
|
||||
* Supports 2 different timing parameters for both chip selects.
|
||||
*
|
||||
* Note 1: the sdrc_init_params_cs[01] must be sorted rate descending.
|
||||
* Note 2: If sdrc_init_params_cs_1 is not NULL it must be of same size
|
||||
* as sdrc_init_params_cs_0.
|
||||
*
|
||||
* Fills in the struct omap_sdrc_params * for each chip select.
|
||||
* Returns 0 upon success or -1 upon failure.
|
||||
*/
|
||||
int omap2_sdrc_get_params(unsigned long r,
|
||||
struct omap_sdrc_params **sdrc_cs0,
|
||||
struct omap_sdrc_params **sdrc_cs1)
|
||||
{
|
||||
struct omap_sdrc_params *sp0, *sp1;
|
||||
|
||||
if (!sdrc_init_params_cs0)
|
||||
return -1;
|
||||
|
||||
sp0 = sdrc_init_params_cs0;
|
||||
sp1 = sdrc_init_params_cs1;
|
||||
|
||||
while (sp0->rate && sp0->rate != r) {
|
||||
sp0++;
|
||||
if (sdrc_init_params_cs1)
|
||||
sp1++;
|
||||
}
|
||||
|
||||
if (!sp0->rate)
|
||||
return -1;
|
||||
|
||||
*sdrc_cs0 = sp0;
|
||||
*sdrc_cs1 = sp1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms)
|
||||
{
|
||||
omap2_sdrc_base = sdrc;
|
||||
|
||||
@ -80,9 +80,6 @@ static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
|
||||
struct omap_sdrc_params *sdrc_cs1) {};
|
||||
#endif
|
||||
|
||||
int omap2_sdrc_get_params(unsigned long r,
|
||||
struct omap_sdrc_params **sdrc_cs0,
|
||||
struct omap_sdrc_params **sdrc_cs1);
|
||||
void omap2_sms_save_context(void);
|
||||
void omap2_sms_restore_context(void);
|
||||
|
||||
|
||||
@ -802,21 +802,6 @@ static u8 omap_vc_calc_vsel(struct voltagedomain *voltdm, u32 uvolt)
|
||||
return voltdm->pmic->uv_to_vsel(uvolt);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
/**
|
||||
* omap_pm_setup_sr_i2c_pcb_length - set length of SR I2C traces on PCB
|
||||
* @mm: length of the PCB trace in millimetres
|
||||
*
|
||||
* Sets the PCB trace length for the I2C channel. By default uses 63mm.
|
||||
* This is needed for properly calculating the capacitance value for
|
||||
* the PCB trace, and for setting the SR I2C channel timing parameters.
|
||||
*/
|
||||
void __init omap_pm_setup_sr_i2c_pcb_length(u32 mm)
|
||||
{
|
||||
sr_i2c_pcb_length = mm;
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init omap_vc_init_channel(struct voltagedomain *voltdm)
|
||||
{
|
||||
struct omap_vc_channel *vc = voltdm->vc;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user