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dt-bindings: mailbox: mpfs: fix reg properties
When the binding for this was originally written, and later modified, mistakes were made - and the precise nature of the later modification should have been a giveaway, but alas I was naive at the time. A more correct modelling of the hardware is to use two syscons and have a single reg entry for the mailbox, containing the mailbox region. The two syscons contain the general control/status registers for the mailbox and the interrupt related registers respectively. The reason for two syscons is that the same mailbox is present on the non-SoC version of the FPGA, which has no interrupt controller, and the shared part of the rtl was unchanged between devices. This is now coming to a head, because the control/status registers share a register region with the "tvs" (temperature & voltage sensors) registers and, as it turns out, people do want to monitor temperatures and voltages... Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
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@ -15,6 +15,8 @@ properties:
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reg:
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oneOf:
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- items:
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- description: mailbox data registers
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- items:
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- description: mailbox control & data registers
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- description: mailbox interrupt registers
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@ -23,6 +25,7 @@ properties:
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- description: mailbox control registers
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- description: mailbox interrupt registers
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- description: mailbox data registers
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deprecated: true
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interrupts:
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maxItems: 1
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@ -41,12 +44,12 @@ additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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mbox: mailbox@37020000 {
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#address-cells = <1>;
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#size-cells = <1>;
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mailbox@37020800 {
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compatible = "microchip,mpfs-mailbox";
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reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>,
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<0x0 0x37020800 0x0 0x100>;
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reg = <0x37020800 0x100>;
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interrupt-parent = <&L1>;
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interrupts = <96>;
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#mbox-cells = <1>;
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