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[PATCH] aoa: i2sbus: revamp control layer
This patch revamps the i2sbus control layer by using the macio/keylargo functions instead of directly mapping. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Benjamin Herrenschmidt
Linus Torvalds
parent
a08bc4cb09
commit
977c60238c
@ -6,12 +6,16 @@
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* GPL v2, can be found in COPYING.
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*/
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#include <asm/io.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/macio.h>
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#include <asm/pmac_feature.h>
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#include <asm/pmac_pfunc.h>
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#include <asm/keylargo.h>
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#include "i2sbus.h"
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int i2sbus_control_init(struct macio_dev* dev, struct i2sbus_control **c)
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@ -22,26 +26,12 @@ int i2sbus_control_init(struct macio_dev* dev, struct i2sbus_control **c)
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INIT_LIST_HEAD(&(*c)->list);
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if (of_address_to_resource(dev->ofdev.node, 0, &(*c)->rsrc))
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goto err;
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/* we really should be using feature calls instead of mapping
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* these registers. It's safe for now since no one else is
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* touching them... */
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(*c)->controlregs = ioremap((*c)->rsrc.start,
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sizeof(struct i2s_control_regs));
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if (!(*c)->controlregs)
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goto err;
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(*c)->macio = dev->bus->chip;
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return 0;
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err:
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kfree(*c);
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*c = NULL;
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return -ENODEV;
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}
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void i2sbus_control_destroy(struct i2sbus_control *c)
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{
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iounmap(c->controlregs);
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kfree(c);
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}
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@ -93,19 +83,22 @@ int i2sbus_control_enable(struct i2sbus_control *c,
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struct i2sbus_dev *i2sdev)
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{
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struct pmf_args args = { .count = 0 };
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int cc;
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struct macio_chip *macio = c->macio;
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if (i2sdev->enable)
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return pmf_call_one(i2sdev->enable, &args);
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if (macio == NULL || macio->base == NULL)
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return -ENODEV;
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switch (i2sdev->bus_number) {
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case 0:
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cc = in_le32(&c->controlregs->cell_control);
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out_le32(&c->controlregs->cell_control, cc | CTRL_CLOCK_INTF_0_ENABLE);
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/* these need to be locked or done through
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* newly created feature calls! */
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MACIO_BIS(KEYLARGO_FCR1, KL1_I2S0_ENABLE);
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break;
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case 1:
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cc = in_le32(&c->controlregs->cell_control);
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out_le32(&c->controlregs->cell_control, cc | CTRL_CLOCK_INTF_1_ENABLE);
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MACIO_BIS(KEYLARGO_FCR1, KL1_I2S1_ENABLE);
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break;
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default:
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return -ENODEV;
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@ -118,7 +111,7 @@ int i2sbus_control_cell(struct i2sbus_control *c,
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int enable)
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{
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struct pmf_args args = { .count = 0 };
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int cc;
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struct macio_chip *macio = c->macio;
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switch (enable) {
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case 0:
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@ -133,18 +126,22 @@ int i2sbus_control_cell(struct i2sbus_control *c,
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printk(KERN_ERR "i2sbus: INVALID CELL ENABLE VALUE\n");
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return -ENODEV;
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}
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if (macio == NULL || macio->base == NULL)
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return -ENODEV;
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switch (i2sdev->bus_number) {
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case 0:
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cc = in_le32(&c->controlregs->cell_control);
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cc &= ~CTRL_CLOCK_CELL_0_ENABLE;
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cc |= enable * CTRL_CLOCK_CELL_0_ENABLE;
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out_le32(&c->controlregs->cell_control, cc);
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if (enable)
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MACIO_BIS(KEYLARGO_FCR1, KL1_I2S0_CELL_ENABLE);
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else
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MACIO_BIC(KEYLARGO_FCR1, KL1_I2S0_CELL_ENABLE);
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break;
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case 1:
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cc = in_le32(&c->controlregs->cell_control);
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cc &= ~CTRL_CLOCK_CELL_1_ENABLE;
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cc |= enable * CTRL_CLOCK_CELL_1_ENABLE;
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out_le32(&c->controlregs->cell_control, cc);
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if (enable)
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MACIO_BIS(KEYLARGO_FCR1, KL1_I2S1_CELL_ENABLE);
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else
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MACIO_BIC(KEYLARGO_FCR1, KL1_I2S1_CELL_ENABLE);
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break;
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default:
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return -ENODEV;
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@ -157,7 +154,7 @@ int i2sbus_control_clock(struct i2sbus_control *c,
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int enable)
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{
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struct pmf_args args = { .count = 0 };
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int cc;
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struct macio_chip *macio = c->macio;
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switch (enable) {
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case 0:
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@ -172,18 +169,22 @@ int i2sbus_control_clock(struct i2sbus_control *c,
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printk(KERN_ERR "i2sbus: INVALID CLOCK ENABLE VALUE\n");
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return -ENODEV;
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}
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if (macio == NULL || macio->base == NULL)
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return -ENODEV;
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switch (i2sdev->bus_number) {
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case 0:
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cc = in_le32(&c->controlregs->cell_control);
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cc &= ~CTRL_CLOCK_CLOCK_0_ENABLE;
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cc |= enable * CTRL_CLOCK_CLOCK_0_ENABLE;
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out_le32(&c->controlregs->cell_control, cc);
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if (enable)
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MACIO_BIS(KEYLARGO_FCR1, KL1_I2S0_CLK_ENABLE_BIT);
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else
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MACIO_BIC(KEYLARGO_FCR1, KL1_I2S0_CLK_ENABLE_BIT);
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break;
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case 1:
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cc = in_le32(&c->controlregs->cell_control);
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cc &= ~CTRL_CLOCK_CLOCK_1_ENABLE;
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cc |= enable * CTRL_CLOCK_CLOCK_1_ENABLE;
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out_le32(&c->controlregs->cell_control, cc);
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if (enable)
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MACIO_BIS(KEYLARGO_FCR1, KL1_I2S1_CLK_ENABLE_BIT);
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else
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MACIO_BIC(KEYLARGO_FCR1, KL1_I2S1_CLK_ENABLE_BIT);
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break;
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default:
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return -ENODEV;
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@ -1,37 +0,0 @@
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/*
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* i2sbus driver -- bus register definitions
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*
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* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
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*
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* GPL v2, can be found in COPYING.
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*/
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#ifndef __I2SBUS_CONTROLREGS_H
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#define __I2SBUS_CONTROLREGS_H
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/* i2s control registers, at least what we know about them */
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#define __PAD(m,n) u8 __pad##m[n]
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#define _PAD(line, n) __PAD(line, n)
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#define PAD(n) _PAD(__LINE__, (n))
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struct i2s_control_regs {
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PAD(0x38);
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__le32 fcr0; /* 0x38 (unknown) */
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__le32 cell_control; /* 0x3c (fcr1) */
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__le32 fcr2; /* 0x40 (unknown) */
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__le32 fcr3; /* 0x44 (fcr3) */
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__le32 clock_control; /* 0x48 (unknown) */
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PAD(4);
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/* total size: 0x50 bytes */
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} __attribute__((__packed__));
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#define CTRL_CLOCK_CELL_0_ENABLE (1<<10)
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#define CTRL_CLOCK_CLOCK_0_ENABLE (1<<12)
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#define CTRL_CLOCK_SWRESET_0 (1<<11)
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#define CTRL_CLOCK_INTF_0_ENABLE (1<<13)
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#define CTRL_CLOCK_CELL_1_ENABLE (1<<17)
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#define CTRL_CLOCK_CLOCK_1_ENABLE (1<<18)
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#define CTRL_CLOCK_SWRESET_1 (1<<19)
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#define CTRL_CLOCK_INTF_1_ENABLE (1<<20)
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#endif /* __I2SBUS_CONTROLREGS_H */
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@ -7,20 +7,22 @@
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*/
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#ifndef __I2SBUS_H
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#define __I2SBUS_H
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#include <asm/dbdma.h>
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#include <linux/interrupt.h>
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#include <sound/pcm.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <sound/pcm.h>
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#include <asm/prom.h>
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#include <asm/pmac_feature.h>
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#include <asm/dbdma.h>
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#include "i2sbus-interface.h"
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#include "i2sbus-control.h"
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#include "../soundbus.h"
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struct i2sbus_control {
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volatile struct i2s_control_regs __iomem *controlregs;
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struct resource rsrc;
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struct list_head list;
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struct macio_chip *macio;
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};
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#define MAX_DBDMA_COMMANDS 32
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