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ath9k_hw: fix REG_SET_BIT and REG_CLR_BIT for multiple bits

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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau 2011-03-11 21:38:17 +01:00 committed by John W. Linville
parent cf28d7934c
commit 997941d7ef
1 changed files with 2 additions and 2 deletions
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4
drivers/net/wireless/ath/ath9k/hw.h
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@ -95,9 +95,9 @@
#define REG_READ_FIELD(_a, _r, _f) \ #define REG_READ_FIELD(_a, _r, _f) \
(((REG_READ(_a, _r) & _f) >> _f##_S)) (((REG_READ(_a, _r) & _f) >> _f##_S))
#define REG_SET_BIT(_a, _r, _f) \ #define REG_SET_BIT(_a, _r, _f) \
REG_WRITE(_a, _r, REG_READ(_a, _r) | _f) REG_WRITE(_a, _r, REG_READ(_a, _r) | (_f))
#define REG_CLR_BIT(_a, _r, _f) \ #define REG_CLR_BIT(_a, _r, _f) \
REG_WRITE(_a, _r, REG_READ(_a, _r) & ~_f) REG_WRITE(_a, _r, REG_READ(_a, _r) & ~(_f))
#define DO_DELAY(x) do { \ #define DO_DELAY(x) do { \
if ((++(x) % 64) == 0) \ if ((++(x) % 64) == 0) \