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net: pcs: xpcs: there is only one PHY ID
The xpcs driver has an apparently inadequate structure for the actual hardware it drives. These defines and the xpcs_probe() function would suggest that there is one PHY ID per supported PHY interface type, and the driver simply validates whether the mode it should operate in (the argument of xpcs_probe) matches what the hardware is capable of: #define SYNOPSYS_XPCS_USXGMII_ID 0x7996ced0 #define SYNOPSYS_XPCS_10GKR_ID 0x7996ced0 #define SYNOPSYS_XPCS_XLGMII_ID 0x7996ced0 #define SYNOPSYS_XPCS_SGMII_ID 0x7996ced0 #define SYNOPSYS_XPCS_MASK 0xffffffff but that is not the case, because upon closer inspection, all the above 4 PHY ID definitions are in fact equal. So it is the same XPCS that is compatible with all 4 sets of PHY interface types. This change introduces an array of struct xpcs_compat which is populated by the single struct xpcs_id instance. It also eliminates the bogus defines for multiple Synopsys XPCS PHY IDs and replaces them with a single XPCS_ID, which better reflects the way in which the hardware operates. Because we are touching this area of the code anyway, the new array of struct xpcs_compat, as well as the array of xpcs_id, have been moved towards the end of the file, since they are variable declarations not definitions. If whichever of struct xpcs_compat or struct xpcs_id need to gain a function pointer member in the future, it is easier to reference functions (no forward declarations needed) if we have the const variable declarations at the end of the file. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -12,10 +12,7 @@
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#include <linux/phylink.h>
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#include <linux/workqueue.h>
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#define SYNOPSYS_XPCS_USXGMII_ID 0x7996ced0
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#define SYNOPSYS_XPCS_10GKR_ID 0x7996ced0
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#define SYNOPSYS_XPCS_XLGMII_ID 0x7996ced0
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#define SYNOPSYS_XPCS_SGMII_ID 0x7996ced0
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#define SYNOPSYS_XPCS_ID 0x7996ced0
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#define SYNOPSYS_XPCS_MASK 0xffffffff
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/* Vendor regs access */
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@ -163,56 +160,39 @@ static const int xpcs_sgmii_features[] = {
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static const phy_interface_t xpcs_usxgmii_interfaces[] = {
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PHY_INTERFACE_MODE_USXGMII,
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PHY_INTERFACE_MODE_MAX,
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};
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static const phy_interface_t xpcs_10gkr_interfaces[] = {
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PHY_INTERFACE_MODE_10GKR,
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PHY_INTERFACE_MODE_MAX,
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};
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static const phy_interface_t xpcs_xlgmii_interfaces[] = {
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PHY_INTERFACE_MODE_XLGMII,
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PHY_INTERFACE_MODE_MAX,
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};
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static const phy_interface_t xpcs_sgmii_interfaces[] = {
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PHY_INTERFACE_MODE_SGMII,
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PHY_INTERFACE_MODE_MAX,
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};
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static struct xpcs_id {
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u32 id;
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u32 mask;
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enum {
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DW_XPCS_USXGMII,
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DW_XPCS_10GKR,
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DW_XPCS_XLGMII,
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DW_XPCS_SGMII,
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DW_XPCS_INTERFACE_MAX,
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};
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struct xpcs_compat {
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const int *supported;
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const phy_interface_t *interface;
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int num_interfaces;
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int an_mode;
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} xpcs_id_list[] = {
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{
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.id = SYNOPSYS_XPCS_USXGMII_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_usxgmii_features,
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.interface = xpcs_usxgmii_interfaces,
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.an_mode = DW_AN_C73,
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}, {
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.id = SYNOPSYS_XPCS_10GKR_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_10gkr_features,
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.interface = xpcs_10gkr_interfaces,
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.an_mode = DW_AN_C73,
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}, {
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.id = SYNOPSYS_XPCS_XLGMII_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_xlgmii_features,
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.interface = xpcs_xlgmii_interfaces,
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.an_mode = DW_AN_C73,
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}, {
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.id = SYNOPSYS_XPCS_SGMII_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_sgmii_features,
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.interface = xpcs_sgmii_interfaces,
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.an_mode = DW_AN_C37_SGMII,
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},
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};
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struct xpcs_id {
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u32 id;
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u32 mask;
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const struct xpcs_compat *compat;
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};
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static int xpcs_read(struct mdio_xpcs_args *xpcs, int dev, u32 reg)
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@ -911,35 +891,82 @@ static u32 xpcs_get_id(struct mdio_xpcs_args *xpcs)
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}
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static bool xpcs_check_features(struct mdio_xpcs_args *xpcs,
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struct xpcs_id *match,
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const struct xpcs_id *match,
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phy_interface_t interface)
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{
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int i;
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int i, j;
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for (i = 0; match->interface[i] != PHY_INTERFACE_MODE_MAX; i++) {
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if (match->interface[i] == interface)
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break;
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for (i = 0; i < DW_XPCS_INTERFACE_MAX; i++) {
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const struct xpcs_compat *compat = &match->compat[i];
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bool supports_interface = false;
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for (j = 0; j < compat->num_interfaces; j++) {
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if (compat->interface[j] == interface) {
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supports_interface = true;
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break;
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}
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}
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if (!supports_interface)
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continue;
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/* Populate the supported link modes for this
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* PHY interface type
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*/
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for (j = 0; compat->supported[j] != __ETHTOOL_LINK_MODE_MASK_NBITS; j++)
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set_bit(compat->supported[j], xpcs->supported);
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xpcs->an_mode = compat->an_mode;
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return true;
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}
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if (match->interface[i] == PHY_INTERFACE_MODE_MAX)
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return false;
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for (i = 0; match->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++)
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set_bit(match->supported[i], xpcs->supported);
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xpcs->an_mode = match->an_mode;
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return true;
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return false;
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}
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static const struct xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = {
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[DW_XPCS_USXGMII] = {
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.supported = xpcs_usxgmii_features,
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.interface = xpcs_usxgmii_interfaces,
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.num_interfaces = ARRAY_SIZE(xpcs_usxgmii_interfaces),
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.an_mode = DW_AN_C73,
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},
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[DW_XPCS_10GKR] = {
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.supported = xpcs_10gkr_features,
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.interface = xpcs_10gkr_interfaces,
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.num_interfaces = ARRAY_SIZE(xpcs_10gkr_interfaces),
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.an_mode = DW_AN_C73,
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},
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[DW_XPCS_XLGMII] = {
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.supported = xpcs_xlgmii_features,
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.interface = xpcs_xlgmii_interfaces,
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.num_interfaces = ARRAY_SIZE(xpcs_xlgmii_interfaces),
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.an_mode = DW_AN_C73,
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},
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[DW_XPCS_SGMII] = {
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.supported = xpcs_sgmii_features,
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.interface = xpcs_sgmii_interfaces,
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.num_interfaces = ARRAY_SIZE(xpcs_sgmii_interfaces),
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.an_mode = DW_AN_C37_SGMII,
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},
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};
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static const struct xpcs_id xpcs_id_list[] = {
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{
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.id = SYNOPSYS_XPCS_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.compat = synopsys_xpcs_compat,
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},
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};
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static int xpcs_probe(struct mdio_xpcs_args *xpcs, phy_interface_t interface)
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{
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const struct xpcs_id *match = NULL;
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u32 xpcs_id = xpcs_get_id(xpcs);
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struct xpcs_id *match = NULL;
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int i;
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for (i = 0; i < ARRAY_SIZE(xpcs_id_list); i++) {
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struct xpcs_id *entry = &xpcs_id_list[i];
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const struct xpcs_id *entry = &xpcs_id_list[i];
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if ((xpcs_id & entry->mask) == entry->id) {
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match = entry;
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