mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-01-08 14:23:19 +00:00
Qualcomm Arm32 DeviceTree updates for v6.12
MSM8226 gains CPU frequency scaling support and CPU thermal zones wired up. The Nokia Lumia 630 and 830 gains inertial sensors. Samsung Galaxy S5 gains pstore functionality. A range of fixes for DeviceTree validation issues are added. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmbYtTkVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FzDYP/3XNNXoSdwQpiQgrHYeGSk4HTIj/ zAb/AcHqcvvTbViAokoQRHzr5Z6OO8P3NjnPVMhvHU/lsqPIYOZkmk0N5HQ3nrQY GfENoiG8xdxbJAxbX0xwr/YOpXIhdkBd9YIbMymJFGKL/Y9qkMxie5vb8bDbyBvA iAnUPEybZn+5aRzXEMSS4R7Ua276H2DRhBYGEObC5oGt69m4XRCEjDUeOlx7xlRb AOPdzFInfs+8qRgsWsOMVoXSNVbhaurfop0IrAf4+LTVUpDjy6BRnD3T2uVKFsep FjVoPZ7NVEn9EIfiBpaO+qbYeBEAwjwHHN5jaHu2RG5KjbuzhKbsV1xjG9kPN96s zljrvJqMmCmjiABaR7kGopubajlJ5GeihcObM1mE3Z0PQo6qJkpi4pdUGw+2n+hG 2HQz/Bz4Hip157Eu6phwIQUVtX3xcyZGH/kWqeesCHUgWvj1jTT5X0F/GSj7x6jW t5e4PAtIvby/wecUpk+HucAHQI04VBixTUKB702hsVxexRLoM7Hbe/rIsmK2JPQs dp7MIInMhFU4VWswgoM7QieVwxBGrnJnrYEkGg0JSCmkelEv5Kt+5tY8Fa6JipVy 1PWyi6VvtFxC2ZJssgg71coirvla2h3unFt3zgfAVcLUhJQUHcolOz3zKD9qbrKK VtF0f2KJKy5e7zss =1RD7 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbZhrgACgkQYKtH/8kJ UicvQhAAgxfDqlVChRhqaJ3A5LjfcSpuTxPboeyEAT2ZIVeSiV6j2cw3ETf+Wedd F6XAvIv3bC4bm1qpYeUxXegceP8VqctFDAUc8gzBvI0XcudlGSIKnQi9vS8tExEr Rjc7V6xEepahHRsA2YBTTdihauZVWABfoOzYMrLFg4qzkG+10q/29MtubSF86fNC d/lHlAbKUVJdlF1FMdir2Jffru3SMm6qCv7R3VZxhq82Lmb4IoP/DZtSPaAjwZnX UVN5EO684ADNAbbl6mnvLzQoUSLlEjuCQgFh4g9txlIS/hNP32hgAzewtQBK0bsX YTHDuydcUvwkKkdbwNPfSLp+xNBVAxCBDLgDbme/2KuMTk1maQYICBEMbTTECkMT orkLV5cddgO2Bzj2HnHb5BoC/5SAZndg63hlxfy1/ev+o86FvIu1U66+xwGGdhMN eryGRrufzpgBrCLbLEg5VTK7Q0+iDnvut7EeNQiCJkbr47zmXMFsUWlaExrhYk1l enKJ1DGEdyMFPIkObe5BLI1Xx4jW9klUa2iGc6xxo+Ij6MM8CGHBd3fgyq/QQ54T AHvgXvUSmMT/nYcpFpH6GYoA9Y7Odp13e9dp4ukPfc/8XLILj5bFJgptIwxxMMqk GchBUImkI/Xb93Zxy6sEFElsOkQVfv6jyqKdTHzbc8+3whUayt4= =TDqI -----END PGP SIGNATURE----- Merge tag 'qcom-arm32-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm32 DeviceTree updates for v6.12 MSM8226 gains CPU frequency scaling support and CPU thermal zones wired up. The Nokia Lumia 630 and 830 gains inertial sensors. Samsung Galaxy S5 gains pstore functionality. A range of fixes for DeviceTree validation issues are added. * tag 'qcom-arm32-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: add generic compat string to RPM glink channels ARM: dts: qcom: msm8226-microsoft-common: Add inertial sensors ARM: dts: qcom: msm8226: Convert APCS usages to mbox interface ARM: dts: qcom: msm8226: Hook up CPU cooling ARM: dts: qcom: msm8226: Add CPU frequency scaling support ARM: dts: qcom: {a,i}pq8064: correct clock-names in sata node ARM: dts: qcom: apq8064: drop reg-names on sata-phy node ARM: dts: qcom: msm8974pro-samsung-klte: Add pstore node ARM: dts: qcom: ipq4019: adhere to pinctrl dtschema ARM: dts: qcom: ipq8064: adhere to pinctrl dtschema ARM: dts: qcom: apq8064: adhere to pinctrl dtschema ARM: dts: qcom: asus,nexus7-flo: remove duplicate pinctrl handle in i2c nodes ARM: dts: qcom: apq8064-pins: correct error in drive-strength property ARM: dts: qcom: pma8084: add pon node Link: https://lore.kernel.org/r/20240904193228.15466-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
a77498a433
@ -1,5 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <dt-bindings/iio/qcom,spmi-vadc.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/spmi/spmi.h>
|
||||
|
||||
@ -19,12 +20,17 @@ rtc@6000 {
|
||||
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
pwrkey@800 {
|
||||
compatible = "qcom,pm8941-pwrkey";
|
||||
pon@800 {
|
||||
compatible = "qcom,pm8941-pon";
|
||||
reg = <0x800>;
|
||||
interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
|
||||
debounce = <15625>;
|
||||
bias-pull-up;
|
||||
|
||||
pwrkey {
|
||||
compatible = "qcom,pm8941-pwrkey";
|
||||
interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
|
||||
debounce = <15625>;
|
||||
bias-pull-up;
|
||||
linux,code = <KEY_POWER>;
|
||||
};
|
||||
};
|
||||
|
||||
pma8084_gpios: gpio@c000 {
|
||||
|
||||
@ -125,8 +125,6 @@ &gsbi1 {
|
||||
&gsbi1_i2c {
|
||||
status = "okay";
|
||||
clock-frequency = <200000>;
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c128";
|
||||
@ -148,8 +146,6 @@ &gsbi3 {
|
||||
|
||||
&gsbi3_i2c {
|
||||
clock-frequency = <200000>;
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
trackpad@10 {
|
||||
|
||||
@ -188,24 +188,17 @@ &sdcc4 {
|
||||
};
|
||||
|
||||
&tlmm_pinmux {
|
||||
card_detect: card_detect {
|
||||
mux {
|
||||
pins = "gpio26";
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
};
|
||||
card_detect: card-detect-state {
|
||||
pins = "gpio26";
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pcie_pins: pcie_pinmux {
|
||||
mux {
|
||||
pins = "gpio27";
|
||||
function = "gpio";
|
||||
};
|
||||
conf {
|
||||
pins = "gpio27";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pcie_pins: pcie-state {
|
||||
pins = "gpio27";
|
||||
function = "gpio";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -321,24 +321,17 @@ &sdcc4 {
|
||||
};
|
||||
|
||||
&tlmm_pinmux {
|
||||
card_detect: card_detect {
|
||||
mux {
|
||||
pins = "gpio26";
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
};
|
||||
card_detect: card-detect-state {
|
||||
pins = "gpio26";
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pcie_pins: pcie_pinmux {
|
||||
mux {
|
||||
pins = "gpio27";
|
||||
function = "gpio";
|
||||
};
|
||||
conf {
|
||||
pins = "gpio27";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pcie_pins: pcie-state {
|
||||
pins = "gpio27";
|
||||
function = "gpio";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -1,236 +1,59 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
&tlmm_pinmux {
|
||||
sdc4_gpios: sdc4-gpios {
|
||||
pios {
|
||||
pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
|
||||
function = "sdc4";
|
||||
};
|
||||
};
|
||||
|
||||
sdcc1_pins: sdcc1-pin-active {
|
||||
clk {
|
||||
sdcc1_default_state: sdcc1-default-state {
|
||||
clk-pins {
|
||||
pins = "sdc1_clk";
|
||||
drive-strengh = <16>;
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
cmd {
|
||||
cmd-pins {
|
||||
pins = "sdc1_cmd";
|
||||
drive-strengh = <10>;
|
||||
drive-strength = <10>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
data {
|
||||
data-pins {
|
||||
pins = "sdc1_data";
|
||||
drive-strengh = <10>;
|
||||
drive-strength = <10>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
sdcc3_pins: sdcc3-pin-active {
|
||||
clk {
|
||||
sdcc3_default_state: sdcc3-default-state {
|
||||
clk-pins {
|
||||
pins = "sdc3_clk";
|
||||
drive-strengh = <8>;
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
cmd {
|
||||
cmd-pins {
|
||||
pins = "sdc3_cmd";
|
||||
drive-strengh = <8>;
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
data {
|
||||
data-pins {
|
||||
pins = "sdc3_data";
|
||||
drive-strengh = <8>;
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
ps_hold: ps_hold {
|
||||
mux {
|
||||
pins = "gpio78";
|
||||
function = "ps_hold";
|
||||
};
|
||||
sdc4_default_state: sdc4-default-state {
|
||||
pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
|
||||
function = "sdc4";
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1 {
|
||||
mux {
|
||||
pins = "gpio20", "gpio21";
|
||||
function = "gsbi1";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio20", "gpio21";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
gsbi1_uart_2pins: gsbi1-uart-2pins-state {
|
||||
pins = "gpio18", "gpio19";
|
||||
function = "gsbi1";
|
||||
};
|
||||
|
||||
i2c1_pins_sleep: i2c1_pins_sleep {
|
||||
mux {
|
||||
pins = "gpio20", "gpio21";
|
||||
function = "gpio";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio20", "gpio21";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
gsbi1_uart_2pins: gsbi1_uart_2pins {
|
||||
mux {
|
||||
pins = "gpio18", "gpio19";
|
||||
function = "gsbi1";
|
||||
};
|
||||
};
|
||||
|
||||
gsbi1_uart_4pins: gsbi1_uart_4pins {
|
||||
mux {
|
||||
pins = "gpio18", "gpio19", "gpio20", "gpio21";
|
||||
function = "gsbi1";
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2 {
|
||||
mux {
|
||||
pins = "gpio24", "gpio25";
|
||||
function = "gsbi2";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio24", "gpio25";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins_sleep: i2c2_pins_sleep {
|
||||
mux {
|
||||
pins = "gpio24", "gpio25";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio24", "gpio25";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c3_pins: i2c3 {
|
||||
mux {
|
||||
pins = "gpio8", "gpio9";
|
||||
function = "gsbi3";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio8", "gpio9";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c3_pins_sleep: i2c3_pins_sleep {
|
||||
mux {
|
||||
pins = "gpio8", "gpio9";
|
||||
function = "gpio";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio8", "gpio9";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_pins: i2c4 {
|
||||
mux {
|
||||
pins = "gpio12", "gpio13";
|
||||
function = "gsbi4";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio12", "gpio13";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_pins_sleep: i2c4_pins_sleep {
|
||||
mux {
|
||||
pins = "gpio12", "gpio13";
|
||||
function = "gpio";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio12", "gpio13";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi5_default: spi5_default {
|
||||
pinmux {
|
||||
pins = "gpio51", "gpio52", "gpio54";
|
||||
function = "gsbi5";
|
||||
};
|
||||
|
||||
pinmux_cs {
|
||||
function = "gpio";
|
||||
pins = "gpio53";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio51", "gpio52", "gpio54";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinconf_cs {
|
||||
pins = "gpio53";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
spi5_sleep: spi5_sleep {
|
||||
pinmux {
|
||||
function = "gpio";
|
||||
pins = "gpio51", "gpio52", "gpio53", "gpio54";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio51", "gpio52", "gpio53", "gpio54";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
i2c6_pins: i2c6 {
|
||||
mux {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "gsbi6";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio16", "gpio17";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c6_pins_sleep: i2c6_pins_sleep {
|
||||
mux {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "gpio";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio16", "gpio17";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
gsbi1_uart_4pins: gsbi1-uart-4pins-state {
|
||||
pins = "gpio18", "gpio19", "gpio20", "gpio21";
|
||||
function = "gsbi1";
|
||||
};
|
||||
|
||||
gsbi4_uart_pin_a: gsbi4-uart-pin-active-state {
|
||||
@ -249,70 +72,147 @@ tx-pins {
|
||||
};
|
||||
};
|
||||
|
||||
gsbi6_uart_2pins: gsbi6_uart_2pins {
|
||||
mux {
|
||||
pins = "gpio14", "gpio15";
|
||||
function = "gsbi6";
|
||||
};
|
||||
gsbi6_uart_2pins: gsbi6-uart-2pins-state {
|
||||
pins = "gpio14", "gpio15";
|
||||
function = "gsbi6";
|
||||
};
|
||||
|
||||
gsbi6_uart_4pins: gsbi6_uart_4pins {
|
||||
mux {
|
||||
pins = "gpio14", "gpio15", "gpio16", "gpio17";
|
||||
function = "gsbi6";
|
||||
};
|
||||
gsbi6_uart_4pins: gsbi6-uart-4pins-state {
|
||||
pins = "gpio14", "gpio15", "gpio16", "gpio17";
|
||||
function = "gsbi6";
|
||||
};
|
||||
|
||||
gsbi7_uart_2pins: gsbi7_uart_2pins {
|
||||
mux {
|
||||
pins = "gpio82", "gpio83";
|
||||
function = "gsbi7";
|
||||
};
|
||||
gsbi7_uart_2pins: gsbi7-uart-2pins-state {
|
||||
pins = "gpio82", "gpio83";
|
||||
function = "gsbi7";
|
||||
};
|
||||
|
||||
gsbi7_uart_4pins: gsbi7_uart_4pins {
|
||||
mux {
|
||||
pins = "gpio82", "gpio83", "gpio84", "gpio85";
|
||||
function = "gsbi7";
|
||||
};
|
||||
gsbi7_uart_4pins: gsbi7_uart_4pins-state {
|
||||
pins = "gpio82", "gpio83", "gpio84", "gpio85";
|
||||
function = "gsbi7";
|
||||
};
|
||||
|
||||
i2c7_pins: i2c7 {
|
||||
mux {
|
||||
pins = "gpio84", "gpio85";
|
||||
function = "gsbi7";
|
||||
};
|
||||
i2c1_default_state: i2c1-default-state {
|
||||
pins = "gpio20", "gpio21";
|
||||
function = "gsbi1";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio84", "gpio85";
|
||||
i2c1_sleep_state: i2c1-sleep-state {
|
||||
pins = "gpio20", "gpio21";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c2_default_state: i2c2-default-state {
|
||||
pins = "gpio24", "gpio25";
|
||||
function = "gsbi2";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c2_sleep_state: i2c2-sleep-state {
|
||||
pins = "gpio24", "gpio25";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c3_default_state: i2c3-default-state {
|
||||
pins = "gpio8", "gpio9";
|
||||
function = "gsbi3";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c3_sleep_state: i2c3-sleep-state {
|
||||
pins = "gpio8", "gpio9";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c4_default_state: i2c4-default-state {
|
||||
pins = "gpio12", "gpio13";
|
||||
function = "gsbi4";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c4_sleep_state: i2c4-sleep-state {
|
||||
pins = "gpio12", "gpio13";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c6_default_state: i2c6-default-state {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "gsbi6";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c6_sleep_state: i2c6-sleep-state {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c7_default_state: i2c7-default-state {
|
||||
pins = "gpio84", "gpio85";
|
||||
function = "gsbi7";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c7_sleep_state: i2c7-sleep-state {
|
||||
pins = "gpio84", "gpio85";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
spi5_default_state: spi5-default-state {
|
||||
spi5-pins {
|
||||
pins = "gpio51", "gpio52", "gpio54";
|
||||
function = "gsbi5";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c7_pins_sleep: i2c7_pins_sleep {
|
||||
mux {
|
||||
pins = "gpio84", "gpio85";
|
||||
spi5-cs-pins {
|
||||
pins = "gpio53";
|
||||
function = "gpio";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio84", "gpio85";
|
||||
drive-strength = <2>;
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
riva_fm_pin_a: riva-fm-active {
|
||||
spi5_sleep_state: spi5-sleep-state {
|
||||
spi5-pins {
|
||||
pins = "gpio51", "gpio52", "gpio53", "gpio54";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
riva_fm_pin_a: riva-fm-active-state {
|
||||
pins = "gpio14", "gpio15";
|
||||
function = "riva_fm";
|
||||
};
|
||||
|
||||
riva_bt_pin_a: riva-bt-active {
|
||||
riva_bt_pin_a: riva-bt-active-state {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "riva_bt";
|
||||
};
|
||||
|
||||
riva_wlan_pin_a: riva-wlan-active {
|
||||
riva_wlan_pin_a: riva-wlan-active-state {
|
||||
pins = "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
|
||||
function = "riva_wlan";
|
||||
|
||||
@ -320,22 +220,24 @@ riva_wlan_pin_a: riva-wlan-active {
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
hdmi_pinctrl: hdmi-pinctrl {
|
||||
mux {
|
||||
pins = "gpio70", "gpio71", "gpio72";
|
||||
function = "hdmi";
|
||||
};
|
||||
|
||||
pinconf_ddc {
|
||||
hdmi_pinctrl: hdmi-pinctrl-state {
|
||||
ddc-pins {
|
||||
pins = "gpio70", "gpio71";
|
||||
function = "hdmi";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
pinconf_hpd {
|
||||
hpd-pins {
|
||||
pins = "gpio72";
|
||||
function = "hdmi";
|
||||
bias-pull-down;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
ps_hold_default_state: ps-hold-default-state {
|
||||
pins = "gpio78";
|
||||
function = "ps_hold";
|
||||
};
|
||||
};
|
||||
|
||||
@ -373,21 +373,21 @@ &sdcc3 {
|
||||
cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdcc3_pins>, <&sdcc3_cd_pin_a>;
|
||||
pinctrl-0 = <&sdcc3_default_state>, <&sdcc3_cd_pin_a>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tlmm_pinmux {
|
||||
gsbi5_uart_pin_a: gsbi5-uart-pin-active {
|
||||
rx {
|
||||
gsbi5_uart_pin_a: gsbi5-uart-pin-active-state {
|
||||
rx-pins {
|
||||
pins = "gpio52";
|
||||
function = "gsbi5";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
tx {
|
||||
tx-pins {
|
||||
pins = "gpio51";
|
||||
function = "gsbi5";
|
||||
drive-strength = <4>;
|
||||
@ -396,7 +396,7 @@ tx {
|
||||
};
|
||||
|
||||
|
||||
sdcc3_cd_pin_a: sdcc3-cd-pin-active {
|
||||
sdcc3_cd_pin_a: sdcc3-cd-pin-active-state {
|
||||
pins = "gpio26";
|
||||
function = "gpio";
|
||||
|
||||
|
||||
@ -302,7 +302,7 @@ tlmm_pinmux: pinctrl@800000 {
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ps_hold>;
|
||||
pinctrl-0 = <&ps_hold_default_state>;
|
||||
};
|
||||
|
||||
sfpb_wrapper_mutex: syscon@1200000 {
|
||||
@ -435,8 +435,8 @@ gsbi1_serial: serial@12450000 {
|
||||
|
||||
gsbi1_i2c: i2c@12460000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-1 = <&i2c1_pins_sleep>;
|
||||
pinctrl-0 = <&i2c1_default_state>;
|
||||
pinctrl-1 = <&i2c1_sleep_state>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x12460000 0x1000>;
|
||||
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -465,8 +465,8 @@ gsbi2: gsbi@12480000 {
|
||||
gsbi2_i2c: i2c@124a0000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
reg = <0x124a0000 0x1000>;
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
pinctrl-1 = <&i2c2_pins_sleep>;
|
||||
pinctrl-0 = <&i2c2_default_state>;
|
||||
pinctrl-1 = <&i2c2_sleep_state>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
|
||||
@ -489,8 +489,8 @@ gsbi3: gsbi@16200000 {
|
||||
ranges;
|
||||
gsbi3_i2c: i2c@16280000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
pinctrl-1 = <&i2c3_pins_sleep>;
|
||||
pinctrl-0 = <&i2c3_default_state>;
|
||||
pinctrl-1 = <&i2c3_sleep_state>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16280000 0x1000>;
|
||||
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -528,8 +528,8 @@ gsbi4_serial: serial@16340000 {
|
||||
|
||||
gsbi4_i2c: i2c@16380000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c4_pins>;
|
||||
pinctrl-1 = <&i2c4_pins_sleep>;
|
||||
pinctrl-0 = <&i2c4_default_state>;
|
||||
pinctrl-1 = <&i2c4_sleep_state>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16380000 0x1000>;
|
||||
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -565,8 +565,8 @@ gsbi5_spi: spi@1a280000 {
|
||||
compatible = "qcom,spi-qup-v1.1.1";
|
||||
reg = <0x1a280000 0x1000>;
|
||||
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
|
||||
pinctrl-0 = <&spi5_default>;
|
||||
pinctrl-1 = <&spi5_sleep>;
|
||||
pinctrl-0 = <&spi5_default_state>;
|
||||
pinctrl-1 = <&spi5_sleep_state>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
@ -599,8 +599,8 @@ gsbi6_serial: serial@16540000 {
|
||||
|
||||
gsbi6_i2c: i2c@16580000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c6_pins>;
|
||||
pinctrl-1 = <&i2c6_pins_sleep>;
|
||||
pinctrl-0 = <&i2c6_default_state>;
|
||||
pinctrl-1 = <&i2c6_sleep_state>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16580000 0x1000>;
|
||||
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -635,8 +635,8 @@ gsbi7_serial: serial@16640000 {
|
||||
|
||||
gsbi7_i2c: i2c@16680000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c7_pins>;
|
||||
pinctrl-1 = <&i2c7_pins_sleep>;
|
||||
pinctrl-0 = <&i2c7_default_state>;
|
||||
pinctrl-1 = <&i2c7_sleep_state>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16680000 0x1000>;
|
||||
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -871,7 +871,6 @@ sata_phy0: phy@1b400000 {
|
||||
compatible = "qcom,apq8064-sata-phy";
|
||||
status = "disabled";
|
||||
reg = <0x1b400000 0x200>;
|
||||
reg-names = "phy_mem";
|
||||
clocks = <&gcc SATA_PHY_CFG_CLK>;
|
||||
clock-names = "cfg";
|
||||
#phy-cells = <0>;
|
||||
@ -890,9 +889,9 @@ sata0: sata@29000000 {
|
||||
<&gcc SATA_PMALIVE_CLK>;
|
||||
clock-names = "slave_iface",
|
||||
"iface",
|
||||
"bus",
|
||||
"core",
|
||||
"rxoob",
|
||||
"core_pmalive";
|
||||
"pmalive";
|
||||
|
||||
assigned-clocks = <&gcc SATA_RXOOB_CLK>,
|
||||
<&gcc SATA_PMALIVE_CLK>;
|
||||
@ -945,7 +944,7 @@ sdcc4: mmc@121c0000 {
|
||||
dmas = <&sdcc4bam 2>, <&sdcc4bam 1>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdc4_gpios>;
|
||||
pinctrl-0 = <&sdc4_default_state>;
|
||||
};
|
||||
|
||||
sdcc4bam: dma-controller@121c2000 {
|
||||
@ -962,7 +961,7 @@ sdcc1: mmc@12400000 {
|
||||
status = "disabled";
|
||||
compatible = "arm,pl18x", "arm,primecell";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdcc1_pins>;
|
||||
pinctrl-0 = <&sdcc1_default_state>;
|
||||
arm,primecell-periphid = <0x00051180>;
|
||||
reg = <0x12400000 0x2000>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
@ -792,7 +792,7 @@ smd-edge {
|
||||
qcom,smd-edge = <15>;
|
||||
|
||||
rpm-requests {
|
||||
compatible = "qcom,rpm-apq8084";
|
||||
compatible = "qcom,rpm-apq8084", "qcom,smd-rpm";
|
||||
qcom,smd-channels = "rpm_requests";
|
||||
|
||||
regulators-0 {
|
||||
|
||||
@ -28,46 +28,42 @@ key-reset {
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
i2c0_pins: i2c0_pinmux {
|
||||
mux_i2c {
|
||||
function = "blsp_i2c0";
|
||||
pins = "gpio58", "gpio59";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
i2c0_pins: i2c0-state {
|
||||
function = "blsp_i2c0";
|
||||
pins = "gpio58", "gpio59";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
mdio_pins: mdio_pinmux {
|
||||
mux_mdio {
|
||||
mdio_pins: mdio-state {
|
||||
mdio-pins {
|
||||
pins = "gpio53";
|
||||
function = "mdio";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
mux_mdc {
|
||||
mdc-pins {
|
||||
pins = "gpio52";
|
||||
function = "mdc";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
serial0_pins: serial0_pinmux {
|
||||
mux_uart {
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
serial0_pins: serial0-state {
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
spi0_pins: spi0_pinmux {
|
||||
mux_spi {
|
||||
spi0_pins: spi0-state {
|
||||
spi0-pins {
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio55", "gpio56", "gpio57";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
mux_cs {
|
||||
spi0-cs-pins {
|
||||
function = "gpio";
|
||||
pins = "gpio54", "gpio4";
|
||||
drive-strength = <2>;
|
||||
|
||||
@ -11,40 +11,35 @@ / {
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
mdio_pins: mdio_pinmux {
|
||||
pinmux_1 {
|
||||
mdio_pins: mdio-state {
|
||||
mdio-pins {
|
||||
pins = "gpio53";
|
||||
function = "mdio";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pinmux_2 {
|
||||
mdc-pins {
|
||||
pins = "gpio52";
|
||||
function = "mdc";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio52", "gpio53";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
serial_pins: serial_pinmux {
|
||||
mux {
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
serial_pins: serial-state{
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
spi_0_pins: spi_0_pinmux {
|
||||
pin {
|
||||
spi_0_pins: spi-0-state {
|
||||
spi0-pins {
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio55", "gpio56", "gpio57";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pin_cs {
|
||||
spi0-cs-pins {
|
||||
function = "gpio";
|
||||
pins = "gpio54", "gpio59";
|
||||
drive-strength = <2>;
|
||||
|
||||
@ -34,30 +34,22 @@ &prng {
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
serial_pins: serial_pinmux {
|
||||
mux {
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
serial_pins: serial-state {
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
spi_0_pins: spi_0_pinmux {
|
||||
pinmux {
|
||||
spi_0_pins: spi-0-state {
|
||||
spi0-pins {
|
||||
pins = "gpio55", "gpio56", "gpio57";
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio55", "gpio56", "gpio57";
|
||||
};
|
||||
pinmux_cs {
|
||||
function = "gpio";
|
||||
pins = "gpio54";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio55", "gpio56", "gpio57";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pinconf_cs {
|
||||
spi0-cs-pins {
|
||||
pins = "gpio54";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
|
||||
@ -24,26 +24,26 @@ memory {
|
||||
|
||||
soc {
|
||||
pinctrl@1000000 {
|
||||
serial_0_pins: serial0-pinmux {
|
||||
serial_0_pins: serial0-state {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
serial_1_pins: serial1-pinmux {
|
||||
serial_1_pins: serial1-state {
|
||||
pins = "gpio8", "gpio9",
|
||||
"gpio10", "gpio11";
|
||||
function = "blsp_uart1";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
spi_0_pins: spi-0-pinmux {
|
||||
pinmux {
|
||||
spi_0_pins: spi-0-state {
|
||||
spi0-pins {
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio13", "gpio14", "gpio15";
|
||||
bias-disable;
|
||||
};
|
||||
pinmux_cs {
|
||||
spi0-cs-pins {
|
||||
function = "gpio";
|
||||
pins = "gpio12";
|
||||
bias-disable;
|
||||
@ -51,13 +51,13 @@ pinmux_cs {
|
||||
};
|
||||
};
|
||||
|
||||
i2c_0_pins: i2c-0-pinmux {
|
||||
i2c_0_pins: i2c-0-state {
|
||||
pins = "gpio20", "gpio21";
|
||||
function = "blsp_i2c0";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
nand_pins: nand-pins {
|
||||
nand_pins: nand-state {
|
||||
pins = "gpio53", "gpio55", "gpio56",
|
||||
"gpio57", "gpio58", "gpio59",
|
||||
"gpio60", "gpio62", "gpio63",
|
||||
|
||||
@ -19,20 +19,20 @@ spi@78b6000 {
|
||||
};
|
||||
|
||||
pinctrl@1000000 {
|
||||
serial_1_pins: serial1-pinmux {
|
||||
serial_1_pins: serial1-state {
|
||||
pins = "gpio8", "gpio9",
|
||||
"gpio10", "gpio11";
|
||||
function = "blsp_uart1";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
spi_0_pins: spi-0-pinmux {
|
||||
pinmux {
|
||||
spi_0_pins: spi-0-state {
|
||||
spi0-pins {
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio13", "gpio14", "gpio15";
|
||||
bias-disable;
|
||||
};
|
||||
pinmux_cs {
|
||||
spio-cs-pins {
|
||||
function = "gpio";
|
||||
pins = "gpio12";
|
||||
bias-disable;
|
||||
|
||||
@ -9,7 +9,7 @@ / {
|
||||
|
||||
soc {
|
||||
pinctrl@1000000 {
|
||||
serial_1_pins: serial1-pinmux {
|
||||
serial_1_pins: serial1-state {
|
||||
pins = "gpio8", "gpio9";
|
||||
function = "blsp_uart1";
|
||||
bias-disable;
|
||||
|
||||
@ -24,19 +24,19 @@ chosen {
|
||||
|
||||
soc {
|
||||
pinctrl@1000000 {
|
||||
serial_0_pins: serial0-pinmux {
|
||||
serial_0_pins: serial0-state {
|
||||
pins = "gpio16", "gpio17";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c_0_pins: i2c-0-pinmux {
|
||||
i2c_0_pins: i2c-0-state {
|
||||
pins = "gpio20", "gpio21";
|
||||
function = "blsp_i2c0";
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
nand_pins: nand-pins {
|
||||
nand_pins: nand-state {
|
||||
pins = "gpio53", "gpio55", "gpio56",
|
||||
"gpio57", "gpio58", "gpio59",
|
||||
"gpio60", "gpio62", "gpio63",
|
||||
|
||||
@ -7,12 +7,11 @@ / {
|
||||
|
||||
soc {
|
||||
pinmux@800000 {
|
||||
buttons_pins: buttons_pins {
|
||||
mux {
|
||||
pins = "gpio54", "gpio65";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
buttons_pins: buttons-state {
|
||||
pins = "gpio54", "gpio65";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -404,59 +404,49 @@ main@800000 {
|
||||
};
|
||||
|
||||
&qcom_pinmux {
|
||||
buttons_pins: buttons_pins {
|
||||
mux {
|
||||
pins = "gpio66";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
buttons_pins: buttons-state {
|
||||
pins = "gpio66";
|
||||
function = "gpio";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
leds_pins: leds_pins {
|
||||
mux {
|
||||
pins = "gpio33";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
leds_pins: leds-state {
|
||||
pins = "gpio33";
|
||||
function = "gpio";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
mdio1_pins: mdio1_pins {
|
||||
mux {
|
||||
pins = "gpio10", "gpio11";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
mdio1_pins: mdio1-state {
|
||||
pins = "gpio10", "gpio11";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
sw0_reset_pin: sw0_reset_pin {
|
||||
mux {
|
||||
pins = "gpio16";
|
||||
drive-strength = <16>;
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
input-disable;
|
||||
};
|
||||
sw0_reset_pin: sw0-reset-state {
|
||||
pins = "gpio16";
|
||||
drive-strength = <16>;
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
input-disable;
|
||||
};
|
||||
|
||||
sw1_reset_pin: sw1_reset_pin {
|
||||
mux {
|
||||
pins = "gpio17";
|
||||
drive-strength = <16>;
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
input-disable;
|
||||
};
|
||||
sw1_reset_pin: sw1-reset-state {
|
||||
pins = "gpio17";
|
||||
drive-strength = <16>;
|
||||
function = "gpio";
|
||||
bias-disable;
|
||||
input-disable;
|
||||
};
|
||||
|
||||
usb1_pwr_en_pins: usb1_pwr_en_pins {
|
||||
mux {
|
||||
pins = "gpio4";
|
||||
function = "gpio";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
usb1_pwr_en_pins: usb1-pwr-en-state {
|
||||
pins = "gpio4";
|
||||
function = "gpio";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -399,70 +399,58 @@ qcom_pinmux: pinmux@800000 {
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pcie0_pins: pcie0_pinmux {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "pcie1_rst";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pcie0_pins: pcie0-state {
|
||||
pins = "gpio3";
|
||||
function = "pcie1_rst";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pcie1_pins: pcie1_pinmux {
|
||||
mux {
|
||||
pins = "gpio48";
|
||||
function = "pcie2_rst";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pcie1_pins: pcie1-state {
|
||||
pins = "gpio48";
|
||||
function = "pcie2_rst";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pcie2_pins: pcie2_pinmux {
|
||||
mux {
|
||||
pins = "gpio63";
|
||||
function = "pcie3_rst";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pcie2_pins: pcie2-state {
|
||||
pins = "gpio63";
|
||||
function = "pcie3_rst";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
i2c4_pins: i2c4-default {
|
||||
i2c4_pins: i2c4-state {
|
||||
pins = "gpio12", "gpio13";
|
||||
function = "gsbi4";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
spi_pins: spi_pins {
|
||||
mux {
|
||||
pins = "gpio18", "gpio19", "gpio21";
|
||||
function = "gsbi5";
|
||||
drive-strength = <10>;
|
||||
bias-none;
|
||||
};
|
||||
spi_pins: spi-state {
|
||||
pins = "gpio18", "gpio19", "gpio21";
|
||||
function = "gsbi5";
|
||||
drive-strength = <10>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
leds_pins: leds_pins {
|
||||
mux {
|
||||
pins = "gpio7", "gpio8", "gpio9",
|
||||
"gpio26", "gpio53";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
leds_pins: leds-state {
|
||||
pins = "gpio7", "gpio8", "gpio9",
|
||||
"gpio26", "gpio53";
|
||||
function = "gpio";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
|
||||
buttons_pins: buttons_pins {
|
||||
mux {
|
||||
pins = "gpio54";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
buttons_pins: buttons-state {
|
||||
pins = "gpio54";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
nand_pins: nand_pins {
|
||||
mux {
|
||||
nand_pins: nand-state {
|
||||
nand-pins {
|
||||
pins = "gpio34", "gpio35", "gpio36",
|
||||
"gpio37", "gpio38", "gpio39",
|
||||
"gpio40", "gpio41", "gpio42",
|
||||
@ -473,14 +461,14 @@ mux {
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pullups {
|
||||
nand-pullup-pins {
|
||||
pins = "gpio39";
|
||||
function = "nand";
|
||||
drive-strength = <10>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
hold {
|
||||
nand-hold-pins {
|
||||
pins = "gpio40", "gpio41", "gpio42",
|
||||
"gpio43", "gpio44", "gpio45",
|
||||
"gpio46", "gpio47";
|
||||
@ -490,25 +478,21 @@ hold {
|
||||
};
|
||||
};
|
||||
|
||||
mdio0_pins: mdio0-pins {
|
||||
mux {
|
||||
pins = "gpio0", "gpio1";
|
||||
function = "mdio";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
mdio0_pins: mdio0-state {
|
||||
pins = "gpio0", "gpio1";
|
||||
function = "mdio";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
rgmii2_pins: rgmii2-pins {
|
||||
mux {
|
||||
pins = "gpio27", "gpio28", "gpio29",
|
||||
"gpio30", "gpio31", "gpio32",
|
||||
"gpio51", "gpio52", "gpio59",
|
||||
"gpio60", "gpio61", "gpio62";
|
||||
function = "rgmii2";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
rgmii2_pins: rgmii2-state {
|
||||
pins = "gpio27", "gpio28", "gpio29",
|
||||
"gpio30", "gpio31", "gpio32",
|
||||
"gpio51", "gpio52", "gpio59",
|
||||
"gpio60", "gpio61", "gpio62";
|
||||
function = "rgmii2";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
@ -1292,7 +1276,7 @@ sata: sata@29000000 {
|
||||
<&gcc SATA_A_CLK>,
|
||||
<&gcc SATA_RXOOB_CLK>,
|
||||
<&gcc SATA_PMALIVE_CLK>;
|
||||
clock-names = "slave_face", "iface", "core",
|
||||
clock-names = "slave_iface", "iface", "core",
|
||||
"rxoob", "pmalive";
|
||||
|
||||
assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;
|
||||
|
||||
@ -84,6 +84,32 @@ smem_region: smem@fa00000 {
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_i2c2 {
|
||||
status = "okay";
|
||||
|
||||
magnetometer: magnetometer@c {
|
||||
compatible = "asahi-kasei,ak09911";
|
||||
reg = <0x0c>;
|
||||
|
||||
vdd-supply = <&pm8226_l15>;
|
||||
vid-supply = <&pm8226_l6>;
|
||||
};
|
||||
|
||||
accelerometer: accelerometer@1e {
|
||||
compatible = "kionix,kx022-1020";
|
||||
reg = <0x1e>;
|
||||
|
||||
interrupts-extended = <&tlmm 63 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
vdd-supply = <&pm8226_l15>;
|
||||
vddio-supply = <&pm8226_l6>;
|
||||
|
||||
mount-matrix = "1", "0", "0",
|
||||
"0", "-1", "0",
|
||||
"0", "0", "1";
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_i2c5 {
|
||||
status = "okay";
|
||||
|
||||
|
||||
@ -10,6 +10,9 @@
|
||||
|
||||
#include "qcom-msm8226-microsoft-common.dtsi"
|
||||
|
||||
/* This device has no magnetometer */
|
||||
/delete-node/ &magnetometer;
|
||||
|
||||
/ {
|
||||
model = "Nokia Lumia 630";
|
||||
compatible = "microsoft,moneypenny", "qcom,msm8226";
|
||||
|
||||
@ -12,6 +12,7 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
#include <dt-bindings/reset/qcom,gcc-msm8974.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
@ -44,8 +45,11 @@ CPU0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
qcom,acc = <&acc0>;
|
||||
qcom,saw = <&saw0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
@ -54,8 +58,11 @@ CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
qcom,acc = <&acc1>;
|
||||
qcom,saw = <&saw1>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
CPU2: cpu@2 {
|
||||
@ -64,8 +71,11 @@ CPU2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
qcom,acc = <&acc2>;
|
||||
qcom,saw = <&saw2>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
CPU3: cpu@3 {
|
||||
@ -74,8 +84,11 @@ CPU3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&apcs>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
qcom,acc = <&acc3>;
|
||||
qcom,saw = <&saw3>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
@ -98,6 +111,29 @@ memory@0 {
|
||||
reg = <0x0 0x0>;
|
||||
};
|
||||
|
||||
cpu_opp_table: opp-table-cpu {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
};
|
||||
|
||||
opp-384000000 {
|
||||
opp-hz = /bits/ 64 <384000000>;
|
||||
};
|
||||
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
};
|
||||
|
||||
opp-787200000 {
|
||||
opp-hz = /bits/ 64 <787200000>;
|
||||
};
|
||||
|
||||
/* Higher CPU frequencies need speedbin support */
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a7-pmu";
|
||||
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
|
||||
@ -121,11 +157,11 @@ master-stats {
|
||||
|
||||
smd-edge {
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
|
||||
qcom,ipc = <&apcs 8 0>;
|
||||
mboxes = <&apcs 0>;
|
||||
qcom,smd-edge = <15>;
|
||||
|
||||
rpm_requests: rpm-requests {
|
||||
compatible = "qcom,rpm-msm8226";
|
||||
compatible = "qcom,rpm-msm8226", "qcom,smd-rpm";
|
||||
qcom,smd-channels = "rpm_requests";
|
||||
|
||||
rpmcc: clock-controller {
|
||||
@ -199,7 +235,7 @@ smp2p-adsp {
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 8 10>;
|
||||
mboxes = <&apcs 10>;
|
||||
|
||||
qcom,local-pid = <0>;
|
||||
qcom,remote-pid = <2>;
|
||||
@ -231,9 +267,75 @@ intc: interrupt-controller@f9000000 {
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
apcs: syscon@f9011000 {
|
||||
compatible = "syscon";
|
||||
apcs: mailbox@f9011000 {
|
||||
compatible = "qcom,msm8226-apcs-kpss-global",
|
||||
"qcom,msm8916-apcs-kpss-global", "syscon";
|
||||
reg = <0xf9011000 0x1000>;
|
||||
#mbox-cells = <1>;
|
||||
clocks = <&a7pll>, <&gcc GPLL0_VOTE>;
|
||||
clock-names = "pll", "aux";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
a7pll: clock@f9016000 {
|
||||
compatible = "qcom,msm8226-a7pll";
|
||||
reg = <0xf9016000 0x40>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&xo_board>;
|
||||
clock-names = "xo";
|
||||
operating-points-v2 = <&a7pll_opp_table>;
|
||||
|
||||
a7pll_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-768000000 {
|
||||
opp-hz = /bits/ 64 <768000000>;
|
||||
};
|
||||
|
||||
opp-787200000 {
|
||||
opp-hz = /bits/ 64 <787200000>;
|
||||
};
|
||||
|
||||
opp-998400000 {
|
||||
opp-hz = /bits/ 64 <998400000>;
|
||||
};
|
||||
|
||||
opp-1094400000 {
|
||||
opp-hz = /bits/ 64 <1094400000>;
|
||||
};
|
||||
|
||||
opp-1190400000 {
|
||||
opp-hz = /bits/ 64 <1190400000>;
|
||||
};
|
||||
|
||||
opp-1305600000 {
|
||||
opp-hz = /bits/ 64 <1305600000>;
|
||||
};
|
||||
|
||||
opp-1344000000 {
|
||||
opp-hz = /bits/ 64 <1344000000>;
|
||||
};
|
||||
|
||||
opp-1401600000 {
|
||||
opp-hz = /bits/ 64 <1401600000>;
|
||||
};
|
||||
|
||||
opp-1497600000 {
|
||||
opp-hz = /bits/ 64 <1497600000>;
|
||||
};
|
||||
|
||||
opp-1593600000 {
|
||||
opp-hz = /bits/ 64 <1593600000>;
|
||||
};
|
||||
|
||||
opp-1689600000 {
|
||||
opp-hz = /bits/ 64 <1689600000>;
|
||||
};
|
||||
|
||||
opp-1785600000 {
|
||||
opp-hz = /bits/ 64 <1785600000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
saw_l2: power-manager@f9012000 {
|
||||
@ -571,7 +673,7 @@ gcc: clock-controller@fc400000 {
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
|
||||
clocks = <&xo_board>,
|
||||
<&sleep_clk>;
|
||||
clock-names = "xo",
|
||||
"sleep_clk";
|
||||
@ -1130,7 +1232,7 @@ adsp: remoteproc@fe200000 {
|
||||
smd-edge {
|
||||
interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 8 8>;
|
||||
mboxes = <&apcs 8>;
|
||||
qcom,smd-edge = <1>;
|
||||
|
||||
label = "lpass";
|
||||
@ -1159,6 +1261,16 @@ cpu0-thermal {
|
||||
|
||||
thermal-sensors = <&tsens 5>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
cpu_alert0: trip0 {
|
||||
temperature = <75000>;
|
||||
@ -1180,6 +1292,16 @@ cpu1-thermal {
|
||||
|
||||
thermal-sensors = <&tsens 2>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
cpu_alert1: trip0 {
|
||||
temperature = <75000>;
|
||||
|
||||
@ -13,6 +13,9 @@
|
||||
/* This device has touchscreen on i2c1 instead */
|
||||
/delete-node/ &touchscreen;
|
||||
|
||||
/* The magnetometer used on this device is currently unknown */
|
||||
/delete-node/ &magnetometer;
|
||||
|
||||
/ {
|
||||
model = "Nokia Lumia 830";
|
||||
compatible = "microsoft,tesla", "qcom,msm8926", "qcom,msm8226";
|
||||
|
||||
@ -136,7 +136,7 @@ smd-edge {
|
||||
qcom,smd-edge = <15>;
|
||||
|
||||
rpm_requests: rpm-requests {
|
||||
compatible = "qcom,rpm-msm8974";
|
||||
compatible = "qcom,rpm-msm8974", "qcom,smd-rpm";
|
||||
qcom,smd-channels = "rpm_requests";
|
||||
|
||||
rpmcc: clock-controller {
|
||||
@ -149,7 +149,7 @@ rpmcc: clock-controller {
|
||||
};
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
reserved_memory: reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
@ -438,6 +438,19 @@ fuelgauge_pin: fuelgauge-int-state {
|
||||
};
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
ramoops@3e8e0000 {
|
||||
compatible = "ramoops";
|
||||
reg = <0x3e8e0000 0x200000>;
|
||||
|
||||
console-size = <0x100000>;
|
||||
record-size = <0x10000>;
|
||||
ftrace-size = <0x10000>;
|
||||
pmsg-size = <0x80000>;
|
||||
ecc-size = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&remoteproc_adsp {
|
||||
status = "okay";
|
||||
cx-supply = <&pma8084_s2>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user