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dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
There are duplicated definitions of peric0 and peric1 cmu blocks. Thus,
they should be defined correctly as numerical order.
Fixes: 680e1c8370
("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220727021357.152421-2-chanho61.park@samsung.com
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@ -226,21 +226,21 @@
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#define CLK_GOUT_PERIC0_IPCLK_8 28
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#define CLK_GOUT_PERIC0_IPCLK_9 29
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#define CLK_GOUT_PERIC0_IPCLK_10 30
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#define CLK_GOUT_PERIC0_IPCLK_11 30
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#define CLK_GOUT_PERIC0_PCLK_0 31
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#define CLK_GOUT_PERIC0_PCLK_1 32
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#define CLK_GOUT_PERIC0_PCLK_2 33
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#define CLK_GOUT_PERIC0_PCLK_3 34
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#define CLK_GOUT_PERIC0_PCLK_4 35
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#define CLK_GOUT_PERIC0_PCLK_5 36
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#define CLK_GOUT_PERIC0_PCLK_6 37
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#define CLK_GOUT_PERIC0_PCLK_7 38
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#define CLK_GOUT_PERIC0_PCLK_8 39
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#define CLK_GOUT_PERIC0_PCLK_9 40
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#define CLK_GOUT_PERIC0_PCLK_10 41
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#define CLK_GOUT_PERIC0_PCLK_11 42
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#define CLK_GOUT_PERIC0_IPCLK_11 31
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#define CLK_GOUT_PERIC0_PCLK_0 32
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#define CLK_GOUT_PERIC0_PCLK_1 33
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#define CLK_GOUT_PERIC0_PCLK_2 34
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#define CLK_GOUT_PERIC0_PCLK_3 35
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#define CLK_GOUT_PERIC0_PCLK_4 36
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#define CLK_GOUT_PERIC0_PCLK_5 37
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#define CLK_GOUT_PERIC0_PCLK_6 38
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#define CLK_GOUT_PERIC0_PCLK_7 39
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#define CLK_GOUT_PERIC0_PCLK_8 40
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#define CLK_GOUT_PERIC0_PCLK_9 41
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#define CLK_GOUT_PERIC0_PCLK_10 42
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#define CLK_GOUT_PERIC0_PCLK_11 43
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#define PERIC0_NR_CLK 43
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#define PERIC0_NR_CLK 44
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/* CMU_PERIC1 */
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#define CLK_MOUT_PERIC1_BUS_USER 1
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@ -272,21 +272,21 @@
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#define CLK_GOUT_PERIC1_IPCLK_8 28
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#define CLK_GOUT_PERIC1_IPCLK_9 29
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#define CLK_GOUT_PERIC1_IPCLK_10 30
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#define CLK_GOUT_PERIC1_IPCLK_11 30
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#define CLK_GOUT_PERIC1_PCLK_0 31
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#define CLK_GOUT_PERIC1_PCLK_1 32
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#define CLK_GOUT_PERIC1_PCLK_2 33
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#define CLK_GOUT_PERIC1_PCLK_3 34
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#define CLK_GOUT_PERIC1_PCLK_4 35
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#define CLK_GOUT_PERIC1_PCLK_5 36
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#define CLK_GOUT_PERIC1_PCLK_6 37
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#define CLK_GOUT_PERIC1_PCLK_7 38
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#define CLK_GOUT_PERIC1_PCLK_8 39
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#define CLK_GOUT_PERIC1_PCLK_9 40
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#define CLK_GOUT_PERIC1_PCLK_10 41
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#define CLK_GOUT_PERIC1_PCLK_11 42
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#define CLK_GOUT_PERIC1_IPCLK_11 31
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#define CLK_GOUT_PERIC1_PCLK_0 32
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#define CLK_GOUT_PERIC1_PCLK_1 33
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#define CLK_GOUT_PERIC1_PCLK_2 34
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#define CLK_GOUT_PERIC1_PCLK_3 35
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#define CLK_GOUT_PERIC1_PCLK_4 36
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#define CLK_GOUT_PERIC1_PCLK_5 37
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#define CLK_GOUT_PERIC1_PCLK_6 38
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#define CLK_GOUT_PERIC1_PCLK_7 39
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#define CLK_GOUT_PERIC1_PCLK_8 40
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#define CLK_GOUT_PERIC1_PCLK_9 41
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#define CLK_GOUT_PERIC1_PCLK_10 42
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#define CLK_GOUT_PERIC1_PCLK_11 43
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#define PERIC1_NR_CLK 43
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#define PERIC1_NR_CLK 44
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/* CMU_PERIS */
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#define CLK_MOUT_PERIS_BUS_USER 1
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