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dt-bindings: clock: add Mobileye EyeQ6L/EyeQ6H clock indexes

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Add #defines for Mobileye EyeQ6L and EyeQ6H SoC clocks.

Constant prefixes are:
 - EQ6LC_PLL_: EyeQ6L clock PLLs
 - EQ6HC_SOUTH_PLL_: EyeQ6H south OLB PLLs
 - EQ6HC_SOUTH_DIV_: EyeQ6H south OLB divider clocks
 - EQ6HC_ACC_PLL_: EyeQ6H accelerator OLB PLLs

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20241007-mbly-clk-v5-2-e9d8994269cb@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Théo Lebrun 2024-10-07 15:49:17 +02:00 committed by Stephen Boyd
parent 6e7c710f0b
commit bae7aff581
1 changed files with 21 additions and 0 deletions
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21
include/dt-bindings/clock/mobileye,eyeq5-clk.h
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@ -19,4 +19,25 @@
#define EQ5C_DIV_OSPI 10
#define EQ6LC_PLL_DDR 0
#define EQ6LC_PLL_CPU 1
#define EQ6LC_PLL_PER 2
#define EQ6LC_PLL_VDI 3
#define EQ6HC_SOUTH_PLL_VDI 0
#define EQ6HC_SOUTH_PLL_PCIE 1
#define EQ6HC_SOUTH_PLL_PER 2
#define EQ6HC_SOUTH_PLL_ISP 3
#define EQ6HC_SOUTH_DIV_EMMC 4
#define EQ6HC_SOUTH_DIV_OSPI_REF 5
#define EQ6HC_SOUTH_DIV_OSPI_SYS 6
#define EQ6HC_SOUTH_DIV_TSU 7
#define EQ6HC_ACC_PLL_XNN 0
#define EQ6HC_ACC_PLL_VMP 1
#define EQ6HC_ACC_PLL_PMA 2
#define EQ6HC_ACC_PLL_MPC 3
#define EQ6HC_ACC_PLL_NOC 4
#endif