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ASoC: amd: acp: fix for i2s mode register field update

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I2S mode register field will be set to 1 when tdm mode is enabled.
Update the I2S mode field based on tdm_mode flag check.

This will fix below smatch checker warning.

sound/soc/amd/acp/acp-i2s.c:59 acp_set_i2s_clk()
	warn: odd binop '0x0 & 0x2'

Fixes: 40f74d5f09 ("ASoC: amd: acp: refactor acp i2s clock
	generation code")

Reported-By: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Syed Saba Kareem <Syed.SabaKareem@amd.com>
Link: https://lore.kernel.org/r/20231031135949.1064581-3-Syed.SabaKareem@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Syed Saba Kareem 2023-10-31 19:29:34 +05:30 committed by Mark Brown
parent cba4590036
commit ed2232d491
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GPG Key ID: 24D68B725D5487D0
1 changed files with 2 additions and 2 deletions
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4
sound/soc/amd/acp/acp-i2s.c
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@ -26,7 +26,6 @@
#define DRV_NAME "acp_i2s_playcap"
#define I2S_MASTER_MODE_ENABLE 1
#define I2S_MODE_ENABLE 0
#define LRCLK_DIV_FIELD GENMASK(10, 2)
#define BCLK_DIV_FIELD GENMASK(23, 11)
#define ACP63_LRCLK_DIV_FIELD GENMASK(12, 2)
@ -56,7 +55,8 @@ static inline void acp_set_i2s_clk(struct acp_dev_data *adata, int dai_id)
}
val = I2S_MASTER_MODE_ENABLE;
val |= I2S_MODE_ENABLE & BIT(1);
if (adata->tdm_mode)
val |= BIT(1);
switch (chip->acp_rev) {
case ACP63_DEV: