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coresight: tmc-etr: Use perf_output_handle::head for AUX ring buffer
When enable the Arm CoreSight PMU event, the context for AUX ring buffer is prepared in the structure perf_output_handle, and its field "head" points the head of the AUX ring buffer and it is updated after filling AUX trace data into buffer. Current code uses an extra field etr_perf_buffer::head to maintain the header for the AUX ring buffer which is not necessary; alternatively, it's better to directly use perf_output_handle::head. This patch removes the field etr_perf_buffer::head and directly uses perf_output_handle::head for the head of AUX ring buffer. Signed-off-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20210912125748.2816606-2-leo.yan@linaro.org Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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@ -32,7 +32,6 @@ struct etr_flat_buf {
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* @etr_buf - Actual buffer used by the ETR
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* @pid - The PID this etr_perf_buffer belongs to.
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* @snaphost - Perf session mode
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* @head - handle->head at the beginning of the session.
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* @nr_pages - Number of pages in the ring buffer.
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* @pages - Array of Pages in the ring buffer.
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*/
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@ -41,7 +40,6 @@ struct etr_perf_buffer {
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struct etr_buf *etr_buf;
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pid_t pid;
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bool snapshot;
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unsigned long head;
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int nr_pages;
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void **pages;
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};
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@ -1438,16 +1436,16 @@ static void tmc_free_etr_buffer(void *config)
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* buffer to the perf ring buffer.
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*/
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static void tmc_etr_sync_perf_buffer(struct etr_perf_buffer *etr_perf,
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unsigned long head,
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unsigned long src_offset,
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unsigned long to_copy)
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{
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long bytes;
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long pg_idx, pg_offset;
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unsigned long head = etr_perf->head;
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char **dst_pages, *src_buf;
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struct etr_buf *etr_buf = etr_perf->etr_buf;
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head = etr_perf->head;
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head = PERF_IDX2OFF(head, etr_perf);
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pg_idx = head >> PAGE_SHIFT;
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pg_offset = head & (PAGE_SIZE - 1);
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dst_pages = (char **)etr_perf->pages;
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@ -1554,7 +1552,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
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/* Insert barrier packets at the beginning, if there was an overflow */
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if (lost)
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tmc_etr_buf_insert_barrier_packet(etr_buf, offset);
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tmc_etr_sync_perf_buffer(etr_perf, offset, size);
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tmc_etr_sync_perf_buffer(etr_perf, handle->head, offset, size);
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/*
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* In snapshot mode we simply increment the head by the number of byte
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@ -1614,8 +1612,6 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
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goto unlock_out;
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}
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etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf);
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/*
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* No HW configuration is needed if the sink is already in
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* use for this session.
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