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ARM: 7610/1: versatile: bump IRQ numbers

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The Versatile starts to register Linux IRQ numbers from offset 0
which is illegal, since this is NO_IRQ. Bump all hard-coded IRQs
by 32 to get rid of the problem.

Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Linus Walleij 2012-12-26 01:38:28 +01:00 committed by Russell King
parent 62e4d357aa
commit f556529589
1 changed files with 3 additions and 3 deletions
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6
arch/arm/mach-versatile/include/mach/irqs.h
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@ -25,7 +25,7 @@
* IRQ interrupts definitions are the same as the INT definitions * IRQ interrupts definitions are the same as the INT definitions
* held within platform.h * held within platform.h
*/ */
#define IRQ_VIC_START 0 #define IRQ_VIC_START 32
#define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT) #define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT)
#define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT) #define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT)
#define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx) #define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx)
@ -100,7 +100,7 @@
/* /*
* Secondary interrupt controller * Secondary interrupt controller
*/ */
#define IRQ_SIC_START 32 #define IRQ_SIC_START 64
#define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B) #define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B)
#define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B) #define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B)
#define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0) #define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0)
@ -120,7 +120,7 @@
#define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1) #define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1)
#define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2) #define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2)
#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) #define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3)
#define IRQ_SIC_END 63 #define IRQ_SIC_END 95
#define IRQ_GPIO0_START (IRQ_SIC_END + 1) #define IRQ_GPIO0_START (IRQ_SIC_END + 1)
#define IRQ_GPIO0_END (IRQ_GPIO0_START + 31) #define IRQ_GPIO0_END (IRQ_GPIO0_START + 31)