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dt-bindings: clock: add SM8150 QCOM Graphics clock bindings
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM8150 SoCs. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200709135251.643-8-jonathan@marek.ca Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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description: |
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Qualcomm graphics clock control module which supports the clocks, resets and
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power domains on SDM845/SC7180.
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power domains on SDM845/SC7180/SM8150.
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See also:
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dt-bindings/clock/qcom,gpucc-sdm845.h
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dt-bindings/clock/qcom,gpucc-sc7180.h
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dt-bindings/clock/qcom,gpucc-sm8150.h
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properties:
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compatible:
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enum:
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- qcom,sdm845-gpucc
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- qcom,sc7180-gpucc
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- qcom,sm8150-gpucc
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clocks:
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items:
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include/dt-bindings/clock/qcom,gpucc-sm8150.h
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include/dt-bindings/clock/qcom,gpucc-sm8150.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8150_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8150_H
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/* GPU_CC clock registers */
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#define GPU_CC_AHB_CLK 0
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#define GPU_CC_CRC_AHB_CLK 1
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#define GPU_CC_CX_APB_CLK 2
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#define GPU_CC_CX_GMU_CLK 3
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#define GPU_CC_CX_SNOC_DVM_CLK 4
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#define GPU_CC_CXO_AON_CLK 5
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#define GPU_CC_CXO_CLK 6
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#define GPU_CC_GMU_CLK_SRC 7
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#define GPU_CC_GX_GMU_CLK 8
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#define GPU_CC_PLL1 9
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/* GPU_CC Resets */
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#define GPUCC_GPU_CC_CX_BCR 0
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#define GPUCC_GPU_CC_GFX3D_AON_BCR 1
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#define GPUCC_GPU_CC_GMU_BCR 2
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#define GPUCC_GPU_CC_GX_BCR 3
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#define GPUCC_GPU_CC_SPDM_BCR 4
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#define GPUCC_GPU_CC_XO_BCR 5
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/* GPU_CC GDSCRs */
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#define GPU_CX_GDSC 0
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#define GPU_GX_GDSC 1
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#endif
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