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hwrng: stm32 - rework power management sequences
Implement stm32_rng_suspend()/stm32_rng_resume() low-power APIs called when the hardware block context will be lost. There is no need to save the RNG_CR register in stm32_rng_runtime_suspend() as the context is not lost. Therefore, only enable/disable the RNG in the runtime sequences. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -55,11 +55,25 @@ struct stm32_rng_data {
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bool has_cond_reset;
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bool has_cond_reset;
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};
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};
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/**
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* struct stm32_rng_config - RNG configuration data
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*
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* @cr: RNG configuration. 0 means default hardware RNG configuration
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* @nscr: Noise sources control configuration.
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* @htcr: Health tests configuration.
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*/
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struct stm32_rng_config {
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u32 cr;
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u32 nscr;
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u32 htcr;
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};
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struct stm32_rng_private {
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struct stm32_rng_private {
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struct hwrng rng;
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struct hwrng rng;
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void __iomem *base;
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void __iomem *base;
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struct clk *clk;
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struct clk *clk;
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struct reset_control *rst;
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struct reset_control *rst;
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struct stm32_rng_config pm_conf;
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const struct stm32_rng_data *data;
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const struct stm32_rng_data *data;
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bool ced;
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bool ced;
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bool lock_conf;
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bool lock_conf;
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@ -355,11 +369,10 @@ static int stm32_rng_remove(struct platform_device *ofdev)
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_PM
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static int __maybe_unused stm32_rng_runtime_suspend(struct device *dev)
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static int stm32_rng_runtime_suspend(struct device *dev)
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{
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{
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u32 reg;
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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u32 reg;
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reg = readl_relaxed(priv->base + RNG_CR);
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reg = readl_relaxed(priv->base + RNG_CR);
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reg &= ~RNG_CR_RNGEN;
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reg &= ~RNG_CR_RNGEN;
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@ -369,25 +382,98 @@ static int stm32_rng_runtime_suspend(struct device *dev)
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return 0;
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return 0;
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}
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}
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static int stm32_rng_runtime_resume(struct device *dev)
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static int __maybe_unused stm32_rng_suspend(struct device *dev)
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{
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{
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u32 reg;
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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clk_prepare_enable(priv->clk);
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if (priv->data->has_cond_reset) {
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priv->pm_conf.nscr = readl_relaxed(priv->base + RNG_NSCR);
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priv->pm_conf.htcr = readl_relaxed(priv->base + RNG_HTCR);
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}
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/* Do not save that RNG is enabled as it will be handled at resume */
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priv->pm_conf.cr = readl_relaxed(priv->base + RNG_CR) & ~RNG_CR_RNGEN;
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writel_relaxed(priv->pm_conf.cr, priv->base + RNG_CR);
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clk_disable_unprepare(priv->clk);
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return 0;
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}
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static int __maybe_unused stm32_rng_runtime_resume(struct device *dev)
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{
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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int err;
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u32 reg;
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err = clk_prepare_enable(priv->clk);
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if (err)
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return err;
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/* Clean error indications */
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writel_relaxed(0, priv->base + RNG_SR);
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reg = readl_relaxed(priv->base + RNG_CR);
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reg = readl_relaxed(priv->base + RNG_CR);
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reg |= RNG_CR_RNGEN;
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reg |= RNG_CR_RNGEN;
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writel_relaxed(reg, priv->base + RNG_CR);
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writel_relaxed(reg, priv->base + RNG_CR);
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return 0;
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return 0;
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}
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}
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#endif
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static const struct dev_pm_ops stm32_rng_pm_ops = {
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static int __maybe_unused stm32_rng_resume(struct device *dev)
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{
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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int err;
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u32 reg;
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err = clk_prepare_enable(priv->clk);
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if (err)
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return err;
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/* Clean error indications */
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writel_relaxed(0, priv->base + RNG_SR);
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if (priv->data->has_cond_reset) {
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/*
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* Correct configuration in bits [29:4] must be set in the same
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* access that set RNG_CR_CONDRST bit. Else config setting is
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* not taken into account. CONFIGLOCK bit must also be unset but
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* it is not handled at the moment.
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*/
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writel_relaxed(priv->pm_conf.cr | RNG_CR_CONDRST, priv->base + RNG_CR);
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writel_relaxed(priv->pm_conf.nscr, priv->base + RNG_NSCR);
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writel_relaxed(priv->pm_conf.htcr, priv->base + RNG_HTCR);
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reg = readl_relaxed(priv->base + RNG_CR);
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reg |= RNG_CR_RNGEN;
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reg &= ~RNG_CR_CONDRST;
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writel_relaxed(reg, priv->base + RNG_CR);
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err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_CR, reg,
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reg & ~RNG_CR_CONDRST, 10, 100000);
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if (err) {
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clk_disable_unprepare(priv->clk);
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dev_err((struct device *)priv->rng.priv,
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"%s: timeout:%x CR: %x!\n", __func__, err, reg);
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return -EINVAL;
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}
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} else {
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reg = priv->pm_conf.cr;
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reg |= RNG_CR_RNGEN;
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writel_relaxed(reg, priv->base + RNG_CR);
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}
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return 0;
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}
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static const struct dev_pm_ops __maybe_unused stm32_rng_pm_ops = {
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SET_RUNTIME_PM_OPS(stm32_rng_runtime_suspend,
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SET_RUNTIME_PM_OPS(stm32_rng_runtime_suspend,
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stm32_rng_runtime_resume, NULL)
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stm32_rng_runtime_resume, NULL)
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SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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SET_SYSTEM_SLEEP_PM_OPS(stm32_rng_suspend,
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pm_runtime_force_resume)
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stm32_rng_resume)
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};
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};
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static const struct stm32_rng_data stm32mp13_rng_data = {
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static const struct stm32_rng_data stm32mp13_rng_data = {
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@ -467,7 +553,7 @@ static int stm32_rng_probe(struct platform_device *ofdev)
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static struct platform_driver stm32_rng_driver = {
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static struct platform_driver stm32_rng_driver = {
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.driver = {
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.driver = {
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.name = "stm32-rng",
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.name = "stm32-rng",
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.pm = &stm32_rng_pm_ops,
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.pm = pm_ptr(&stm32_rng_pm_ops),
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.of_match_table = stm32_rng_match,
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.of_match_table = stm32_rng_match,
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},
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},
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.probe = stm32_rng_probe,
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.probe = stm32_rng_probe,
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