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staging: comedi: ni_stc.h: remove NI_PRIVATE_COMMON macro
This macro is used to create the private data structure that is used by the ni_atmio, ni_mio_cs, and ni_pcimio drivers. These drivers all include the ni_mio_common.c source to provide most of the driver functionality. The only driver specific information needed to convert the macro into a proper struct definition is the MAX_N_CALDACS define. This define is used to size a couple array members in the struct. The ni_atmio and ni_mio_cs drivers both define MAX_N_CALDACS as 32. The ni_pcimio driver defines it as (16+16+2). The ni_mio_common file only uses this define to sanity check that the struct members are large enough for the number of channels in the calibration subdevice. Move the MAX_N_CALDACS define to ni_stc.h and set it to the largest number of caldacs (34). The ni_atmio and ni_mio_cs drivers also add one additional member to the private data struct before using the NI_PRIVATE_COMMON macro. For the ni_atmio driver, the struct pnp_dev pointer can be saved in the comedi_device as the 'hw_dev'. The (*detach) of this driver can then use to_pnp_dev() to get it back when detaching the pnp device. In the ni_mio_cs driver, the struct pcmia_device pointer is not used so it can simply be removed. The NI_PRIVATE_COMMON macro can then be converted into a proper struct definition. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -107,8 +107,6 @@ are not supported.
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#define NI_SIZE 0x20
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#define MAX_N_CALDACS 32
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static const struct ni_board_struct ni_boards[] = {
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{.device_id = 44,
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.isapnp_id = 0x0000, /* XXX unknown */
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@ -272,12 +270,6 @@ static const int ni_irqpin[] = {
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#define NI_E_IRQ_FLAGS 0
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struct ni_private {
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struct pnp_dev *isapnp_dev;
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NI_PRIVATE_COMMON
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};
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/* How we access registers */
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#define ni_writel(a, b) (outl((a), (b)+dev->iobase))
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@ -428,7 +420,7 @@ static int ni_atmio_attach(struct comedi_device *dev,
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iobase = pnp_port_start(isapnp_dev, 0);
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irq = pnp_irq(isapnp_dev, 0);
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devpriv->isapnp_dev = isapnp_dev;
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comedi_set_hw_dev(dev, &isapnp_dev->dev);
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}
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ret = comedi_request_region(dev, iobase, NI_SIZE);
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@ -477,12 +469,14 @@ static int ni_atmio_attach(struct comedi_device *dev,
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static void ni_atmio_detach(struct comedi_device *dev)
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{
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struct ni_private *devpriv = dev->private;
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struct pnp_dev *isapnp_dev;
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mio_common_detach(dev);
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comedi_legacy_detach(dev);
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if (devpriv->isapnp_dev)
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pnp_device_detach(devpriv->isapnp_dev);
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isapnp_dev = dev->hw_dev ? to_pnp_dev(dev->hw_dev) : NULL;
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if (isapnp_dev)
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pnp_device_detach(isapnp_dev);
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}
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static struct comedi_driver ni_atmio_driver = {
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@ -56,8 +56,6 @@ See the notes in the ni_atmio.o driver.
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#define NI_SIZE 0x20
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#define MAX_N_CALDACS 32
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static const struct ni_board_struct ni_boards[] = {
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{
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.device_id = 0x010d,
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@ -143,12 +141,6 @@ static const struct ni_board_struct ni_boards[] = {
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#define IRQ_POLARITY 1
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struct ni_private {
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struct pcmcia_device *link;
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NI_PRIVATE_COMMON};
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/* How we access registers */
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#define ni_writel(a, b) (outl((a), (b)+dev->iobase))
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@ -121,8 +121,6 @@ Bugs:
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#define PCIMIO 1
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#undef ATMIO
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#define MAX_N_CALDACS (16+16+2)
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#define DRV_NAME "ni_pcimio"
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/* These are not all the possible ao ranges for 628x boards.
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@ -1044,9 +1042,6 @@ static const struct ni_board_struct ni_boards[] = {
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},
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};
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struct ni_private {
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NI_PRIVATE_COMMON};
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/* How we access registers */
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#define ni_writel(a, b) (writel((a), devpriv->mite->daq_io_addr + (b)))
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@ -1416,92 +1416,94 @@ struct ni_board_struct {
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enum caldac_enum caldac[3];
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};
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#define MAX_N_AO_CHAN 8
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#define NUM_GPCT 2
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#define MAX_N_CALDACS 34
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#define MAX_N_AO_CHAN 8
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#define NUM_GPCT 2
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#define NI_PRIVATE_COMMON \
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uint16_t (*stc_readw)(struct comedi_device *dev, int register); \
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uint32_t (*stc_readl)(struct comedi_device *dev, int register); \
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void (*stc_writew)(struct comedi_device *dev, uint16_t value, int register); \
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void (*stc_writel)(struct comedi_device *dev, uint32_t value, int register); \
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\
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unsigned short dio_output; \
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unsigned short dio_control; \
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int ao0p, ao1p; \
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int lastchan; \
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int last_do; \
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int rt_irq; \
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int irqmask; \
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int aimode; \
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int ai_continuous; \
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int blocksize; \
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int n_left; \
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unsigned int ai_calib_source; \
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unsigned int ai_calib_source_enabled; \
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spinlock_t window_lock; \
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spinlock_t soft_reg_copy_lock; \
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spinlock_t mite_channel_lock; \
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\
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int changain_state; \
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unsigned int changain_spec; \
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\
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unsigned int caldac_maxdata_list[MAX_N_CALDACS]; \
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unsigned short ao[MAX_N_AO_CHAN]; \
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unsigned short caldacs[MAX_N_CALDACS]; \
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\
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unsigned short ai_cmd2; \
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\
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unsigned short ao_conf[MAX_N_AO_CHAN]; \
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unsigned short ao_mode1; \
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unsigned short ao_mode2; \
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unsigned short ao_mode3; \
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unsigned short ao_cmd1; \
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unsigned short ao_cmd2; \
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unsigned short ao_cmd3; \
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unsigned short ao_trigger_select; \
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\
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struct ni_gpct_device *counter_dev; \
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unsigned short an_trig_etc_reg; \
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\
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unsigned ai_offset[512]; \
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\
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unsigned long serial_interval_ns; \
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unsigned char serial_hw_mode; \
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unsigned short clock_and_fout; \
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unsigned short clock_and_fout2; \
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\
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unsigned short int_a_enable_reg; \
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unsigned short int_b_enable_reg; \
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unsigned short io_bidirection_pin_reg; \
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unsigned short rtsi_trig_direction_reg; \
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unsigned short rtsi_trig_a_output_reg; \
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unsigned short rtsi_trig_b_output_reg; \
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unsigned short pfi_output_select_reg[NUM_PFI_OUTPUT_SELECT_REGS]; \
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unsigned short ai_ao_select_reg; \
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unsigned short g0_g1_select_reg; \
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unsigned short cdio_dma_select_reg; \
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\
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unsigned clock_ns; \
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unsigned clock_source; \
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\
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unsigned short atrig_mode; \
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unsigned short atrig_high; \
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unsigned short atrig_low; \
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\
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unsigned short pwm_up_count; \
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unsigned short pwm_down_count; \
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\
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unsigned short ai_fifo_buffer[0x2000]; \
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uint8_t eeprom_buffer[M_SERIES_EEPROM_SIZE]; \
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uint32_t serial_number; \
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\
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struct mite_struct *mite; \
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struct mite_channel *ai_mite_chan; \
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struct mite_channel *ao_mite_chan;\
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struct mite_channel *cdo_mite_chan;\
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struct mite_dma_descriptor_ring *ai_mite_ring; \
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struct mite_dma_descriptor_ring *ao_mite_ring; \
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struct mite_dma_descriptor_ring *cdo_mite_ring; \
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struct ni_private {
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uint16_t (*stc_readw)(struct comedi_device *, int reg);
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uint32_t (*stc_readl)(struct comedi_device *, int reg);
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void (*stc_writew)(struct comedi_device *, uint16_t value, int reg);
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void (*stc_writel)(struct comedi_device *, uint32_t value, int reg);
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unsigned short dio_output;
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unsigned short dio_control;
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int ao0p, ao1p;
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int lastchan;
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int last_do;
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int rt_irq;
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int irqmask;
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int aimode;
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int ai_continuous;
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int blocksize;
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int n_left;
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unsigned int ai_calib_source;
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unsigned int ai_calib_source_enabled;
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spinlock_t window_lock;
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spinlock_t soft_reg_copy_lock;
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spinlock_t mite_channel_lock;
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int changain_state;
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unsigned int changain_spec;
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unsigned int caldac_maxdata_list[MAX_N_CALDACS];
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unsigned short ao[MAX_N_AO_CHAN];
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unsigned short caldacs[MAX_N_CALDACS];
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unsigned short ai_cmd2;
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unsigned short ao_conf[MAX_N_AO_CHAN];
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unsigned short ao_mode1;
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unsigned short ao_mode2;
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unsigned short ao_mode3;
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unsigned short ao_cmd1;
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unsigned short ao_cmd2;
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unsigned short ao_cmd3;
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unsigned short ao_trigger_select;
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struct ni_gpct_device *counter_dev;
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unsigned short an_trig_etc_reg;
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unsigned ai_offset[512];
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unsigned long serial_interval_ns;
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unsigned char serial_hw_mode;
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unsigned short clock_and_fout;
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unsigned short clock_and_fout2;
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unsigned short int_a_enable_reg;
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unsigned short int_b_enable_reg;
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unsigned short io_bidirection_pin_reg;
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unsigned short rtsi_trig_direction_reg;
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unsigned short rtsi_trig_a_output_reg;
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unsigned short rtsi_trig_b_output_reg;
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unsigned short pfi_output_select_reg[NUM_PFI_OUTPUT_SELECT_REGS];
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unsigned short ai_ao_select_reg;
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unsigned short g0_g1_select_reg;
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unsigned short cdio_dma_select_reg;
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unsigned clock_ns;
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unsigned clock_source;
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unsigned short atrig_mode;
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unsigned short atrig_high;
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unsigned short atrig_low;
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unsigned short pwm_up_count;
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unsigned short pwm_down_count;
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unsigned short ai_fifo_buffer[0x2000];
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uint8_t eeprom_buffer[M_SERIES_EEPROM_SIZE];
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uint32_t serial_number;
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struct mite_struct *mite;
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struct mite_channel *ai_mite_chan;
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struct mite_channel *ao_mite_chan;
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struct mite_channel *cdo_mite_chan;
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struct mite_dma_descriptor_ring *ai_mite_ring;
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struct mite_dma_descriptor_ring *ao_mite_ring;
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struct mite_dma_descriptor_ring *cdo_mite_ring;
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struct mite_dma_descriptor_ring *gpct_mite_ring[NUM_GPCT];
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};
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#endif /* _COMEDI_NI_STC_H */
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