For DT case, spi core will call of_alias_get_id() and set master->bus_num if it
was not set.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The purpose of commit 1e8a52e18cfb
"spi: By default setup spi_masters with 1 chipselect and dynamics bus number"
is to avoid setting default value for bus_num and num_chipselect in spi master
drivers. So let's remove the duplicate code.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-By: David Daney <david.daney@cavium.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Remove some coding sytle not in standard in former code.
Signed-off-by: Chao Fu <b44548@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Freescale DSPI module will have two endianess in different platform,
but ARM is little endian. So when DSPI in big endian, core in little endian,
readl and writel can not adjust R/W register in this condition.
This patch will remove general readl/writel, and import regmap mechanism.
Data endian will be transfered in regmap APIs.
Documents: dspi add bool "big-endian" in dts node if DSPI module
work in big endian.
Signed-off-by: Chao Fu <b44548@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Current code in sun6i_spi_set_cs() actually clears CPHA and CPOL bits which is
obvious wrong. The define for SUN6I_TFR_CTL_CS_MASK is wrong. Fix it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
No need to return a 'fake' return value on platform_get_irq() failure.
Just return the error code itself instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
No need to return a 'fake' return value on platform_get_irq() failure.
Just return the error code itself instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle
checking transfer speed. So we can remove the same checking in this driver.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Set "master->max_speed_hz = PCH_MAX_BAUDRATE" then we can remove pch_spi_setup.
In additional, pspi->max_speed_hz will never be 0 because it's default value
will be set to master->max_speed_hz.
Also remove list_empty checking in pch_spi_transfer() because the checking is
done by spi core.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle
checking transfer speed. So we can remove the same checking in this driver.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Mark Brown <broonie@linaro.org>
This checking is already done in the implementation of spi_setup().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
While backporting 33cf00e5 ("spi: attach/detach SPI device to the ACPI
power domain"), I noticed that the code changes were suboptimal:
* Why use &spi->dev when we have dev at hand?
* After fixing the above, spi is used only once, so we don't really
need a local variable for it.
This results in the following clean-up.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
In spi_add_device(), we have the code to validate spi->chip_select.
So remove the duplicate code in various drivers.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Set bits_per_word_mask so spi core will reject transfers that attempt to use
an unsupported bits_per_word value.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
So it will be checked when spi device is added onto the spi bus.
spi_add_device() calls spi_setup() which then calls spi->master->setup().
No need to check it every time sc18is602_transfer_one() is called.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will
handle checking transfer speed.
In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of
spi_device default to max_speed_hz of controller',
spi core will also set default spi->max_speed_hz if it is not set.
So remove the duplicate code in tegra_slink_setup.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will
handle checking transfer speed.
In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of
spi_device default to max_speed_hz of controller',
spi core will also set default spi->max_speed_hz if it is not set.
So remove tegra_sflash_setup().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will
handle checking transfer speed.
In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of
spi_device default to max_speed_hz of controller',
spi core will also set default spi->max_speed_hz if it is not set.
So remove the duplicate code in tegra_spi_setup.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle
checking transfer speed. Then we can remove the same checking in this driver.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Mark Brown <broonie@linaro.org>
In __spi_validate(), xfer->speed_hz is set to be spi->max_speed_hz if it is not
set for this transfer. However, if spi->max_speed_hz is also not set,
xfer->speed_hz is 0. Some drivers (e.g. au1550, tegra114, tegra20-sflash,
tegra20-slink, etc.) then use below code to avoid setting xfer->speed_hz to 0.
/* Set speed to the spi max fequency if spi device has not set */
spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;
Let's handle it in spi core.
If spi->max_speed_hz is not set, make it default to spi->master->max_speed_hz.
So In __spi_validate() if both xfer->speed_hz and spi->max_speed_hz are not set,
xfer->speed_hz will be set to spi->master->max_speed_hz.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Commit 0079aae0f1e6 ("spi: omap2: Add build dependencies for
writel_relaxed()") added an optional Kconfig dependency on SH. That
Kconfig symbol doesn't exist. Apparently SUPERH was intended. Use that.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Calling init_completion() once is enough.
For the rest of the iterations, call reinit_completion() instead.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Remove unused devdata pointer 'spi100k' in function omap1_spi100k_txrx_pio().
Detected by Coverity: CID 1077869.
Signed-off-by: Christian Engelmayer <cengelma@gmx.at>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Michal Nazarewicz <mina86@mina86.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Remove functions that only had an effect when using S3C_DMA and inline
dmaengine_terminate_all() since it's pointless to have a function which
expands to a single function call.
Signed-off-by: Mark Brown <broonie@linaro.org>
All the platforms which use the old S3C_DMA API have now been converted to
dmaengine so we can remove the legacy code from the driver, simplifying
maintenance.
Signed-off-by: Mark Brown <broonie@linaro.org>
When using dmaengine allow the core to do the DMA mapping. We still need
local mapping code for the non-dmaengine case so this doesn't save us
anything for now.
Signed-off-by: Mark Brown <broonie@linaro.org>
We don't modify the list entry while iterating the transfer list.
So use list_for_each_entry instead of list_for_each_entry_safe.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since commit a2fd4f9fa3b9 'spi: Support transfer speed checking in the core',
the SPI core validates the desired speed of a given transfer against the
minimum and maximum speeds supported by the controller.
So we can remove the same code in this driver and let spi core handle checking
the desired speed of a given transfer.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Remove unused devdata pointer 'orion_spi' in function orion_spi_write_read().
Detected by Coverity: CID 1077860.
Signed-off-by: Christian Engelmayer <cengelma@gmx.at>
Signed-off-by: Mark Brown <broonie@linaro.org>
It's pointless to use of_match_ptr within CONFIG_OF guard.
Use of_match_ptr around davinci_spi_of_match when setting .of_match_table.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
spi_master_get_devdata() never returns NULL when spi_alloc_master() success,
so remove NULL test for dspi.
We have ensured master is not NULL before assigning it to dspi->bitbang.master.
So also remove NULL test for dspi->bitbang.master.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The Allwinner A31 has a new SPI controller IP compared to the older Allwinner
SoCs.
It supports DMA, but the driver only does PIO for now, and DMA will be
supported eventually.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Otherwise, spi_setup() fails with unsupported mode bits message.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
We cannot unconditionally use dma_map_single() to map data for use with
SPI since transfers may exceed a page and virtual addresses may not be
provided with physically contiguous pages. Further, addresses allocated
using vmalloc() need to be mapped differently to other addresses.
Currently only the MXS driver handles all this, a few drivers do handle
the possibility that buffers may not be physically contiguous which is
the main potential problem but many don't even do that. Factoring this
out into the core will make it easier for drivers to do a good job so if
the driver is using the core DMA code then generate a scatterlist
instead of mapping to a single address so do that.
This code is mainly based on a combination of the existing code in the MXS
and PXA2xx drivers. In future we should be able to extend it to allow the
core to concatenate adjacent transfers if they are compatible, improving
performance.
Currently for simplicity clients are not allowed to use the scatterlist
when they do DMA mapping, in the future the existing single address
mappings will be replaced with use of the scatterlist most likely as
part of pre-verifying transfers.
This change makes it mandatory to use scatterlists when using the core DMA
mapping so update the s3c64xx driver to do this when used with dmaengine.
Doing so makes the code more ugly but it is expected that the old s3c-dma
code can be removed very soon.
Signed-off-by: Mark Brown <broonie@linaro.org>
It is fairly common for SPI devices to require that one or both transfer
directions is always active. Currently drivers open code this in various
ways with varying degrees of efficiency. Start factoring this out by
providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause
the core to provide buffers for the requested direction if none are
specified in the underlying transfer.
Currently this is fairly inefficient since we actually allocate a data
buffer which may get large, support for mapping transfers using a
scatterlist will allow us to avoid this for DMA based transfers.
Signed-off-by: Mark Brown <broonie@linaro.org>
As of commit 5ce0ba88650f2606244a761d92e2b725f4ab3583 ("spi: rcar: add
Renesas QSPI support on RSPI") the rspi driver handles Renesas QSPI, too,
but this was not reflected in the Kconfig help text.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
The driver core is now taking care of putting our pins into default
state at probe. Thus we can remove the redundant call for it in probe.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Make use of clk_prepare_enable and clk_disable_unprepare to simplify
code. No functional change.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
