IPQ4019 flash partition scheme is moved to nvmem-layout. SDX55 and SDX65
PCIe EP controllers gain missing linux,pci-domain properties.
Stylistic improvements across a range of platforms and devices.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmcoQ6YVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FREcP/R6myVgG1NmZQT6J/mViqlVdNq+e
rSo0/+RDQhtHp+05wn7IoHd1jf9GTuPskZ1NwZ4c2m2CSCkInywkUJj7S21mFUXx
relHhzNSX12umBOndLWEqPzKblo4N4iRluSouZtJ2WlOT/SZ32facMNJ/WbyzTY2
l9uhmj6p5iWqm+Oggb/S1V78PyQ/OVVV7C3vLQLDdCINuSOl8M4MIcsKkPtimWJf
3ulS62IGWISpLZ4ivEb6E+005DImAE/PxtnWOihREtCMwEa9A83OwBccRSMNkAFM
mdAOuCXfPyEJwySzGxA6tVUoh+yqq7Zfbd95s3hvatQIzzf5OQQ27PJ3C0n9Gq9k
YIH9B57QFBnva8gUSwtYPGx6uo07l9msowsU2SdaWTiWlfcx064DF4W7AR4uzRJD
F0GIV6krloPkFQNmrRiV/rBTVzsi5ZuMFbXQNCMn0KgY9M5VCwo+IqZUat91yMvv
7fxOCqDcJ4d9MOR11RNTqjqXaQS/Z/OtnTNOoTxCmcR4HBvOb1SDBRoVILTkPUV4
QHhDxrVFYL7q3wb/8RlbNgoXx4E+QPMnenVYtYeoXdjo6xVigGu2jFoCVGNFUTCO
qx1zvbZnJHDRdvBPTBBj3Hroo1hnWAbrG0ev/Y2hbHMM0Xm8dVEFczL/ZdFfQqKO
raWBtp8r3QuU2wcJ
=fOIQ
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmczynMACgkQYKtH/8kJ
UicQahAA2qEhnzn1Cn/mYnLI8qOZ0ugsE7z5M+xwBRpspzobytSQfz0HclUQhlZv
NFUgPYpA0K5TxiaA+mVOTLAXktEpEo34b2cNDVRLa+t+XRMdNrvO/zPSqrA+eyaL
kDcAqU9Y/tc3roKMyaq46lLsw5yK5AUZxaMSFr0Ph8cKxbtiNhIGOCcPEb8496iv
6dJ+0eqUx/lu1IjqxOrdpipvgw1o/AdIWL+t6mXwhGOkw5uu5hcQo+wczTAtTEcp
Vr9PfHyPTVyGOpRrPtheT9UGr7coHQaoiGX2SvzoIBS+UMFN7/jDjeq95/03WFuN
XaddwvnMnKcV7FrGUvBv8zoEBGGDkpFNlOPSwfWcnwB647YpbuhC+yJsAvbxr2XG
/WdA1PO3fo1Sf+AoO4t4oOQk/5gHKScVovuUOfuhH1W36JFzLUt/VKMdtOfcgjbv
9tVqmzgiFBBNZyos97BzsglUAJDbjwXP8uM/Abm7K1iBIG/ax/nY9afRt1+fKbPb
LagQuEr1sw5cdJM7Nc36tmvzU678dFVy1tHHbi7uj3wAlYnveyeSJw1MpjQZaQzW
OCu1atP4vJltDvottaDE8jrIQHWJ986zbDhllewIVgw9aAHpFz+y2g0bYz3VA0a+
w8idVfwk7hYCvGy2AidpdxgAtrPlwQefBu2X6ytBQ0a3FB/etOQ=
=dKCF
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm32-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.13
IPQ4019 flash partition scheme is moved to nvmem-layout. SDX55 and SDX65
PCIe EP controllers gain missing linux,pci-domain properties.
Stylistic improvements across a range of platforms and devices.
* tag 'qcom-arm32-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: ipq4019: use nvmem-layout
ARM: dts: qcom: change labels to lower-case
ARM: dts: qcom: sdx65: Add 'linux,pci-domain' to PCIe EP controller node
ARM: dts: qcom: sdx55: Add 'linux,pci-domain' to PCIe EP controller node
ARM: dts: qcom: minor whitespace cleanup
ARM: dts: qcom: drop underscore in node names
Link: https://lore.kernel.org/r/20241104034744.14378-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for the Pinephone Pro and for consistencies sake it gets its own SoC
dtsi to not hide the specifics in the Pinephone Pro devicetree.
New boards: OrangePi-5b, NanoPi R3S, ArmSom Sige 5 (first rk3576 board),
Radxa e20c (first rk3528 board), Powkiddy RGB20SX, RK3588S-EVB1 and
the ArmSoM LM7 SoM with W3 carrier board.
HDMI support for rk3588 brings the first graphical output capability
there. This includes of course needed changes to a number of boards.
And finally a bunch of newly enabled peripherals on different boards,
as well as changes to adhere better to bindings and removal/change of
deprecated properties.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmchMHMQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgWZRB/0a236rKxhltu2TqhZjElxGBwtUoIYvBDRL
iLL/WAltN2qbdUHbojzltsM2GDMDCmA6SJmbiY2p8colN+t/qTRY3vgnr1R7gpvU
QILcSHFVVI9inutLpfy+vq95gRafDSQ7YxyB4gLllokwIspJLPN4PL/7Wj1X8UWb
wipzaNiPUsmtWmFU/HWyrB7Msg1kqP80jhNeEv/khPvIRFfj7PhuL1+B00rozqaf
Aknqzded2eCTvqQLo7LH0o3bAchjIVvzSA7yxt/gQP0E+PerKp4xuFisGXjToo71
xrGpeU3j9cN6prglo1A92Lfpgbegk1IJGCzuxO+zL4uuIO6JRjYt
=7Um9
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmczyVYACgkQYKtH/8kJ
UiewmxAAuIBnrRWnDIlb/9lcsr96FIVoi9p3HSikK2b4XID5iDzlVTCWNDHS7rcX
8aE5Tjy8WdElbGLdd6pQ8FLOOsbEbbuhKmlMu7FQn0dGLOJ2N9gzb+Ocdt266oie
8CcyFQk9lfCQmdLQk+If0atPVrQO4y1Rf6TGCUAGy3Gr175NpGcgZQXJqYHZT918
oEg+BqyfOdICfS0DGXWmRQHCiJns/csFa9bvPlG3T0ruOocRsKLj8cAJRYqNel5q
Elt0R6YI1oadvuJlYir5g4Vm1EZH2hlCYAfWAtzoErTY4KlxyuvdnrgsVau/jyd9
v5z0iMcvSCePfyQ1xfasJwgnvOxm1ac7U0ktN/0evsatb5f9rhoW/dxrsioB/ZpH
a25FYKOig6RZqZU96rOueQSZqmhqTH9IKikkITGWd9ggaMbEYD5PpJ5noCRvzb+7
CTUl7b/GKG0oR48JkH3tLLar/QgZlZ+dNyGOxoKfmUPjeWkzfFs65NoG6Yhg927c
1F2tj/iul5kOH1V9ZhLe3sZ1cCSlc4YgH09sgqPcrsHL8tu/gkqUZneqv1KdgZsB
ug+tvPMWHNO8p2OPY2S30o34LUOWXem0BjZjSRrzMC0sPF1dlehfNDPcsOq2Bz29
o5OHOtzEu5ezdvsZOuXZE53BMKkFud/tgNbDSMrBJetX87D/0jc=
=RMLZ
-----END PGP SIGNATURE-----
Merge tag 'v6.13-armsoc/dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New SoCs: basic RK3528 support, RK3399S - a variant made specifically
for the Pinephone Pro and for consistencies sake it gets its own SoC
dtsi to not hide the specifics in the Pinephone Pro devicetree.
New boards: OrangePi-5b, NanoPi R3S, ArmSom Sige 5 (first rk3576 board),
Radxa e20c (first rk3528 board), Powkiddy RGB20SX, RK3588S-EVB1 and
the ArmSoM LM7 SoM with W3 carrier board.
HDMI support for rk3588 brings the first graphical output capability
there. This includes of course needed changes to a number of boards.
And finally a bunch of newly enabled peripherals on different boards,
as well as changes to adhere better to bindings and removal/change of
deprecated properties.
* tag 'v6.13-armsoc/dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (64 commits)
arm64: dts: rockchip: Add rk3588-orangepi-5b device tree
dt-bindings: arm: rockchip: Add Orange Pi 5b enum to Orange Pi 5 entry
arm64: dts: rockchip: refactor common Orange Pi 5 board
arm64: dts: rockchip: Remove 'enable-active-low' from two boards
arm64: dts: rockchip: add HDMI support to rk3588-jaguar
arm64: dts: rockchip: add HDMI support to rk3588-tiger-haikou
arm64: dts: rockchip: add HDMI pinctrl to rk3588-tiger SoM
arm64: dts: rockchip: reorder mmc aliases for NanoPi R3S
arm64: dts: rockchip: enable eMMC HS200 mode for NanoPi R3S
arm64: dts: rockchip: sort props in pmu_io_domains node for NanoPi R3S
arm64: dts: rockchip: replace deprecated snps,reset props for NanoPi R3S
arm64: dts: rockchip: fix model name for FriendlyElec NanoPi R3S
arm64: dts: rockchip: Enable HDMI0 on rock-5a
arm64: dts: rockchip: Enable HDMI0 on rk3588-nanopc-t6
arm64: dts: rockchip: pwm-leds for Orange Pi 5
arm64: dts: rockchip: reorder audio/hdmi nodes in Orange Pi 5
arm64: dts: rockchip: analog audio on Orange Pi 5
arm64: dts: rockchip: Add dtsi file for RK3399S SoC variant
arm64: dts: rockchip: Convert dts files used as parents to dtsi files
arm64: dts: rockchip: fix the pcie refclock oscillator on Rock 5 ITX
...
Link: https://lore.kernel.org/r/12542111.O9o76ZdvQC@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Add new SoC Samsung Exynos8895 and new board using it: Samsung
Galaxy S8 (SM-G950F) mobile phone. Only small support so far:
CPUs (Samsung Mongoose M2), main clock controllers (FSYS, PERIC,
TOP), pin controllers, SPI for cameras, timers.
2. Add new SoC Samsung Exynos990 and new board using it: Samsung
Galaxy Note20 5G (c1s/SM-N981B) mobile phone. Only minimal support
so far: CPUs (Samsung Mongoose M5), pin controllers, timers.
3. Prepare for adding new SoC Samsung Exynos9810 - add bindings. The
SoC DTSI was not yet ready, but it is posted on the mailing lists so
should come soon.
4. ExynosAutov920: Add several clock controllers.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmcglxgQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1wU/D/42+9JlJtXtBLG3Woxm732hW9hxWJsGt76o
Hia6a3lVc7wESCFqIgsWW7cTawEVHAnOYwc4c3e6weNsiDBlau6ZgdcZJ+xpE0o9
SXsE4YDG/7f9zOd4htsIruBXP/Z3isaOXigTanedK8OnxE7IDkKuQ9HxsgXcTnNv
afU57e9c9KNtilAqGHXHzS068rAewzhWCsjIJ2wbQ+xLR5MRM4PccNudLni4uS/8
E5jaRKNgoEg8ifv6SC8coFA1eOAdRmZr/GlTudks1ogko14u9HI4kzEHEUkHOGMF
mLGXnt6x+JNhlYwBWDkZjaQuOXUqQPFKx+abDkyYm2O9BqeCq3DvvmBMMEb6h0PA
jzgH/waeD1IMPf6iv4u/adu9d9AASYK2y4FtqnKqOZtnmuK14XedqSo8IHnaYBSt
AtnmBlmnwQ1Wq/dKw/5ERrRLv8n6dApQuuFKhPvg8NcdJGKN2JnSbYo5aI3IrqB+
B7t7dZ3PL3sElrp1l6BonjiNCGc+px6/3dui7PAGbyEstjfcltmU+E+Wu2OzibIt
zklCiSkHqc1lj4PqVu0x0PRFlrq3ekjRoFfz9tEDSzlBGvXhdad+fzOOS0n43cJN
5NZ/4aN5zDpQVJMYRZQIjsW47KWPgPeFE79SIO5x/lApn7h3aIp7x7XXHLZVjAm9
hzyyDuSFnw==
=Vlqw
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmczyRMACgkQYKtH/8kJ
UieO+xAApQDtC1ktRSCWNXObd6BCm89Qrf5vl+k/aGu1CgYgMhyQ5MNYG5ef+aM8
rPvj4XxUMf9+Pa4sYXeFV4AkA2GDE5hkCfra0t1mAF8ZJIiKjk2d/ZUxNQu+e9D0
RAU0PT6w8xK6td9U9ik+oiCTbTO9DBIL/XHNrTjhpbDQeGiFf3eMGQkN0l2H3vut
iZhFrpnrslLS32czzqdJWxFJ5dZdu8H24WqIgnJMVmZjiG/twO955dk4PK4RYxJU
olnQ97n4XE9ln9NRJnrQ7a9Q8OnuVaidLyugVoL4qWyBmbpHspIp6Bk+94+8msWf
mEUqq8ZjYn7UOLhFi5JtiW1hGKNlDZYd5ye75aRN3TwczVn6Y8VyOM8Vqcg89cvK
V+Vlj6jsc+7znHcihNOr7WBEXomcGWNo9GBBV/H997NHRYvZ6dY+nqQcvBvXoCRh
MLSQ58Mca1eHBLjyMN+izB5Ae+09i6+0ceh0bCry2WGoKnbp+avmpD/crUiD7qXA
OiV4BLNEkbi4rhmw1LM5AC5615Rlv3N171I755YuOcDIfwDADTLklTX95Zniq401
/JaUlk3XDWEM5ocgH1+5ui/2QxammM2jUNvXQLIb884z5MzeEl0QXOlTDkxOO139
rdkyh3na0ZrCQCWPNxRdW6alPgpUdICdxlj0yRErLpsbHXNO2G4=
=Rz3L
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.13
1. Add new SoC Samsung Exynos8895 and new board using it: Samsung
Galaxy S8 (SM-G950F) mobile phone. Only small support so far:
CPUs (Samsung Mongoose M2), main clock controllers (FSYS, PERIC,
TOP), pin controllers, SPI for cameras, timers.
2. Add new SoC Samsung Exynos990 and new board using it: Samsung
Galaxy Note20 5G (c1s/SM-N981B) mobile phone. Only minimal support
so far: CPUs (Samsung Mongoose M5), pin controllers, timers.
3. Prepare for adding new SoC Samsung Exynos9810 - add bindings. The
SoC DTSI was not yet ready, but it is posted on the mailing lists so
should come soon.
4. ExynosAutov920: Add several clock controllers.
* tag 'samsung-dt64-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: arm: samsung: Document Exynos9810 and starlte board binding
dt-bindings: soc: samsung: exynos-pmu: Add exynos9810 compatible
dt-bindings: arm: cpus: Add Samsung Mongoose M3
arm64: dts: exynos8895: Add spi_0/1 nodes
arm64: dts: exynos8895: Add Multi Core Timer (MCT) node
arm64: dts: exynos8895: Add clock management unit nodes
dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible
dt-bindings: clock: samsung: Add Exynos8895 SoC
arm64: dts: exynos: Add initial support for Samsung Galaxy Note20 5G (c1s)
arm64: dts: exynos: Add initial support for the Exynos 990 SoC
dt-bindings: arm: samsung: samsung-boards: Add bindings for Exynos 990 boards
dt-bindings: arm: cpus: Add Samsung Mongoose M5
arm64: dts: exynosautov920: add peric1, misc and hsi0/1 clock DT nodes
dt-bindings: clock: exynosautov920: add peric1, misc and hsi0/1 clock definitions
arm64: dts: exynos: Add initial support for Samsung Galaxy S8
arm64: dts: exynos: Add initial support for exynos8895 SoC
dt-bindings: soc: samsung: exynos-pmu: Add exynos8895 compatible
dt-bindings: arm: samsung: Document dreamlte board binding
dt-bindings: arm: cpus: Add Samsung Mongoose M2
Link: https://lore.kernel.org/r/20241029081002.21106-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Changes in this batch add an device tree file for the industrial module
version of the Jetson AGX Orin Developer Kit. There are also some fixes
for the Jetson TX1 and new features such as touchscreen, temperature
sensor and USB-C extcon support for Smaug (a.k.a. Pixel C).
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmcbs0wACgkQ3SOs138+
s6HCzw//R1YypAZnwxmyaBVaVIIpclZB5rpKTdhoB2FcM4S95gIIZ9ZZidm3S+FG
/Rs70XqSQXNRNEJ5Jp56Q7LaFfWdiWaZwRpNPI+T1gbt2amBKpX3+M845GGzZppa
ojSqNbODW4q5gQCYf/DAUVPWDe4vt6Zj14jk68i6RZmU3cmaUNx7m5KvveNl/mky
aLWksdDlsCqCiOzGtGD/0RPI8oa9UjrGJ/5FbeOPt97nnKMfgFmmWVMkhw9tRflx
dZHDXHIE7L5azTTXA688cvmYhzH+uNyNXAhWJGv1Ph3b0n0Ea/dcfa3IOGmFWYWl
eWh9UjpSdLKMrzoEXrGpxLKDZyjsRygB2H1JRnZBaKzEFon91PbLnFc8KVOzTc6t
NbXhLiZvyMInT/8RIBHYW4/3aKSN3rqYKOISHvIGyKS2qkXhRtl9H7zx0Fxm3B1w
Ogf+g/IxwR28CUHrpq2NRQR4isoQ89vEQ3REUCCyJQP2AydC30+QgJEcjimDtNai
BmsWozMKtDhTlZptwPjTTk0Vh5PL2JWiBMb4OWW6/zSxiXQaUQGjsvSMREgK+q17
rzeNPx2DmFkdQS/mV/JVhq/eUR109O7QH8NakVkKHSyAzv9jBbPzSYpq+7hHgkmg
/diFWUZFgY8C0fl6i4njHWqo4eDUcZQ95rQlUqdv/mra7gn53bg=
=CFl4
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmczyLgACgkQYKtH/8kJ
UicHuA//XNCEzEGrItZbZQXlAgHkEDTPVZ5QKZgCHbFiUaTqkbarutg/oQKpJ3VL
sS2aygj5AiNuIXxEYMVhtNI8hlvSSI7c2uo80tYBnHutU9ajkOsBmapPo4xZzL9+
bPodhgbEoSyViNWWwzV722fZFauEoZvaiFKQQ0RBJMLA5/ZeZPo3pRY/2DdHT6mN
+gY1zoVn37uoX7kdMFqJlRfRlrI+Xf19laowrrj7jUa0x8NqOBCnRnwC5mGJBgKJ
2y8TggfgdsOqmZTQtldzvHamTze838Z9gmFrvDwtTgmDIcZJ9OBHttAENyCHZdki
Eh3zBz7TOh6Filn8radpW2rLcy3pYYXblOr1BTzGMgyYDOuAWQyAN4pfzyzBfa0Q
fHa2dStVQErXZHi3ZI+D0HYlqTymWuDNng6bSuDgqwYr6Qd38Ivvs2Poz35/jpj0
foZf0BJ+rqecumAkQoMcyATHVS/uUGte+4vRQLvFrjuinTn+hn/HuprvtTob1t/n
EQReSd+1PAi1PE6NQTmc39IgTi9hOimeFTF0TSNPJfNVtIeg+UHr2M6sSOsEOqUE
tfLuIMjxMCLiAh5ZkDipd3NPVSWSKO8Gv3XlYzwnNSdoh3ZfYxE//LOwwqjJthRS
ReEzoSTHfrA3JzCr0+T2TQXdPBMyFWb/yIQqAbERZCo7N0Os5G0=
=BaL9
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.13-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.13-rc1
Changes in this batch add an device tree file for the industrial module
version of the Jetson AGX Orin Developer Kit. There are also some fixes
for the Jetson TX1 and new features such as touchscreen, temperature
sensor and USB-C extcon support for Smaug (a.k.a. Pixel C).
* tag 'tegra-for-6.13-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: smaug: Declare cros-ec extcon
arm64: tegra: Add SDMMC sdr104-offsets for Tegra X1
arm64: dts: nvidia: tegra210-smaug: Add TMP451 temperature sensor node
arm64: dts: nvidia: tegra210-smaug: Add touchscreen node
arm64: tegra: p2180: Add mandatory compatible for WiFi node
arm64: tegra: Create SKU8 AGX Orin board file
Link: https://lore.kernel.org/r/20241025150555.2558582-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add support for PCIe on the R-Car V4M SoC and the Gray Hawk
development board,
- Add support for watchdog, OS timer, keyboard switch, SDHI, and MMCIF
on the Genmai development board,
- Add support for watchdog on the RSK+RZA1 development board,
- Add support for QSPI NOR FLASH on the RZ/G2UL SMARC SoM,
- Add support for E-FUSE on the R-Car V3U, S4-8, V4H, and V4M SoCs,
- Use interrupts-extended where it makes sense,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZxJK7wAKCRCKwlD9ZEnx
cIc9AP9qfjKj9dER6XolPiFCNTVkQ4mUwXWSfw2tfcF7c14lQQEArTm1rPjJFnE6
ov1fEylEw6cf/lX63RAx1cO3b2RYOwQ=
=d+VK
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmczyE4ACgkQYKtH/8kJ
UiezOQ//VR2Hkzcr6q3DQLolO6p+DmbXCWmkj/q+xlRBSE+JUsPIE9TqK4Ajb+wa
b/EenZ1wLNtbtqjBuhKDH40Y0Qs2dbUTENBW0nJAegYouiTmFnJAvznOe4nyhKgT
3U8FDnW0Bh+rF078zNG1tsnJ4sO4SL4/ZHBHh4bPVMgyoeCovzofwdw7fu9UMlrV
zXzIPuroPfttgErJfLv7IxjXkQIeLXZn/Bf7Ezqn8RZTbtJOfku8xdwMkhhix4za
FFsECfehEBI/we2bUSxAKSd2z5/RynNbH/a6Zjsbwj+QytesL0e8qWfRZCURjsUF
KJWOpnKZ4ueTSeZdCzxZ1prt9OjJEY8Eh/pzcJWSHk9gYPnllQO7ma6NYaY6qklZ
pMoEfdPEN/VsNs68kq2OC89afb2R5hkbmPv0whj3PBNTbN5PC+G8fjKATe3jHMKr
1aXpP3f79hBIjGF817KioXPVRP6J1A18TYh0c0hHqDgvlC1MiHLW6Va5BTDibWNn
JiQgkYz+7lrJNS5ll8LiUVzUKxLF6gjcsMMCQqLuJfHDmyKGYKcJkZNGzJr7Mp9N
6w+4rYrIiKFzESXRFQPeeRRFOZtLmbuPIw6SzA8VvpY0VvueuYw5xXlXIUfCZYIn
hFsIk10LYPKi2V6d7LjjjbJZw9ic2IXzcwbkv1qEqlxML/WWMhQ=
=XVt1
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.13-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.13
- Add support for PCIe on the R-Car V4M SoC and the Gray Hawk
development board,
- Add support for watchdog, OS timer, keyboard switch, SDHI, and MMCIF
on the Genmai development board,
- Add support for watchdog on the RSK+RZA1 development board,
- Add support for QSPI NOR FLASH on the RZ/G2UL SMARC SoM,
- Add support for E-FUSE on the R-Car V3U, S4-8, V4H, and V4M SoCs,
- Use interrupts-extended where it makes sense,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.13-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (53 commits)
arm64: dts: renesas: rzg3s-smarc: Use interrupts-extended for gpio-keys
arm64: dts: renesas: beacon-renesom: Use interrupts-extended for touchscreen
arm64: dts: renesas: Use interrupts-extended for WLAN
arm64: dts: renesas: Use interrupts-extended for video decoders
arm64: dts: renesas: Use interrupts-extended for USB muxes
arm64: dts: renesas: Use interrupts-extended for PMICs
arm64: dts: renesas: Use interrupts-extended for I/O expanders
arm64: dts: renesas: Use interrupts-extended for HDMI bridges
arm64: dts: renesas: Use interrupts-extended for Ethernet PHYs
arm64: dts: renesas: Use interrupts-extended for DisplayPort bridges
ARM: dts: renesas: kzm9g: Use interrupts-extended for sensors
ARM: dts: renesas: kzm9g: Use interrupts-extended for I/O expander
ARM: dts: renesas: r8a7742-iwg21m: Use interrupts-extended for RTC
ARM: dts: renesas: iwg22d-sodimm: Use interrupts-extended for port expander
ARM: dts: renesas: Use interrupts-extended for video decoders
ARM: dts: renesas: Use interrupts-extended for touchpanels
ARM: dts: renesas: Use interrupts-extended for PMICs
ARM: dts: renesas: Use interrupts-extended for HDMI bridges
ARM: dts: renesas: Use interrupts-extended for Ethernet PHYs
ARM: dts: renesas: Use interrupts-extended for Ethernet MACs
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the TH1520 SoC-based BeagleV Ahead and Sipeed Lichee Pi 4a boards.
The dwmac-thead driver and dt binding have been accepted by netdev and
are in linux-next as well as the dts patch in this pull request. I have
tested next-20241108 on the Ahead and LPi4a boards, and Ethernet works
correctly.
Signed-off-by: Drew Fustini <drew@pdp7.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCZy7HegAKCRDb7CzD2Six
DFKlAP0bQEEODS17qnQ5o08MtzB7oi5zCbgCj5Dv9o4AMKd/VwD/SQftL0u53DR/
6/uaNCXcjlxVflOR7queyUexSu2TmAs=
=n4l7
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmczyBwACgkQYKtH/8kJ
Uicjvw/+KVKkZTOwpLDxxCOD2c4wqJ6Nydd/bMJQSavgAZ8Wd4oUdholAQaDxUfs
brQTSFZHmMxDdmVvb1roLZK48yYok8aq2S39dTAmqS+pXZT58aHtUn+V4m+v5U7h
viPLJBas29IuxM+bgbp4D7sH/bJ/HspXmNBkcQoqxQ0PDed0prPVqnlYZ6IdmHTS
5CWXXjqyx5fm50OOzaxHFR/0K1ErqD9T505Iv//DTKTL3kmMnpj6Qy+4tInc6gFa
S7DU2Of5cQmcNutQlKOJ8xXogFeQoeOSvTRcLNmRc1rm6i3O7SFpvCx1ccgHGKWU
59Oo4Xe31qjI6SFYDkcLsogIOK8ffeUm48ttLrbAGWRRI2SUOhAVDHwd37Hgkbyj
H+d2k8LBl9jGFTGilBR8/VMeXVRw5h21RUAXuEEfvc1/j2GVUcfToWXLu1yJ8MD9
FnSkeFyCq/t+n/8XNXvfH4ku4kk9JG4CrzTH/XuQ1VorM8dN3atJy0c/hKhPsBrB
IWgftNaQrkQ+kDEbOajIIBB4AtE1RHV3DCe1+YRvujxhiMGuMlYKj/7HkA167eLk
5qpdpWVvFBAiUJl8K0Up5CWvyIKk2/cZ5BUrdzAsPcliAcOCTKJwJcjFoh6WzBAy
QxdSKXhsklIxiT4W90gIXs/38juutzyxkMQixARRG0qEMnnM5LQ=
=qfiW
-----END PGP SIGNATURE-----
Merge tag 'thead-dt-for-v6.13-p2' of https://github.com/pdp7/linux into soc/dt
T-HEAD Devicetrees for v6.13, part 2
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the TH1520 SoC-based BeagleV Ahead and Sipeed Lichee Pi 4a boards.
The dwmac-thead driver and dt binding have been accepted by netdev and
are in linux-next as well as the dts patch in this pull request. I have
tested next-20241108 on the Ahead and LPi4a boards, and Ethernet works
correctly.
Signed-off-by: Drew Fustini <drew@pdp7.com>
* tag 'thead-dt-for-v6.13-p2' of https://github.com/pdp7/linux:
riscv: dts: thead: Add TH1520 ethernet nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add nodes for pin controllers on the T-Head TH1520 RISC-V SoC. The
yaml binding and pinctrl-th1520 driver has been merged into next by
Linus W and will be included in the 6.13 pinctrl PR.
The TH1520 GPIO controllers are already supported by the gpio-dwapb
driver. This PR improves GPIO support by adding GPIO ranges and GPIO
line names for the BeagleV Ahead and LicheePi 4A boards. Support is
added for the built-in LEDs on the Ahead board.
Signed-off-by: Drew Fustini <drew@pdp7.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCZxURbgAKCRDb7CzD2Six
DDMiAQD+joKsLCYlTe36dOFjgpZ5/K8tbjcXXoLe/3/HpFjG0wEArvUquuDjcxSa
op9RWVYs+TM9Xheyfgf+cMqL/XQynQ8=
=Ao5X
-----END PGP SIGNATURE-----
Merge tag 'thead-dt-for-v6.13' of https://github.com/pdp7/linux into soc/dt
T-HEAD Devicetrees for v6.13
Add nodes for pin controllers on the T-Head TH1520 RISC-V SoC. The
yaml binding and pinctrl-th1520 driver has been merged into next by
Linus W and will be included in the 6.13 pinctrl PR.
The TH1520 GPIO controllers are already supported by the gpio-dwapb
driver. This PR improves GPIO support by adding GPIO ranges and GPIO
line names for the BeagleV Ahead and LicheePi 4A boards. Support is
added for the built-in LEDs on the Ahead board.
Signed-off-by: Drew Fustini <drew@pdp7.com>
* tag 'thead-dt-for-v6.13' of https://github.com/pdp7/linux:
riscv: dts: thead: remove enabled property for spi0
riscv: dts: thead: Add missing GPIO clock-names
riscv: dtb: thead: Add BeagleV Ahead LEDs
riscv: dts: thead: Add TH1520 pinctrl settings for UART0
riscv: dts: thead: Add Lichee Pi 4M GPIO line names
riscv: dts: thead: Adjust TH1520 GPIO labels
riscv: dts: thead: Add TH1520 GPIO ranges
riscv: dts: thead: Add TH1520 pin control nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the BeagleV Ahead and Sipeed Lichee Pi 4a boards.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[drew: change apb registers from syscon to second reg of gmac node,
add phy reset delay properties for beaglev ahead]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Adds compatible strings for the Kobo Clara 2E eBook reader.
There are two variants differing in the EPD PMIC used.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Document the existing fsl,imx6sll-gpc compatible used with fsl,imx6q-gpc
fallback.
This fixes the following dt-schema warning:
['fsl,imx6sll-gpc', 'fsl,imx6q-gpc'] is too long
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX7 has the following anatop regulators: vdd1p0d and vdd1p2.
i.MX6SX has the following anatop regulators: vddpcie.
Add them to the allowed patternProperties.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Unlike the other i.MX devices, i.MX7 has only two anatop interrupts.
Add logic that contemplates such case to fix the following
dt-schema warning:
anatop@30360000: interrupts: [[0, 49, 4], [0, 51, 4]] is too short
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adds support for the Nitrogen8MP SMARC System on Module and
the Nitrogen8MP Universal SMARC Carrier Board.
Signed-off-by: Bhavin Sharma <bhavin.sharma@siliconsignals.io>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adds support for the Gateworks GW82XX-2X development kit
based on a GW82XX baseboard and a GW702X System On Module.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Per the current binding, QM/QXP DSPs are supposed to have 4
power domains, while the rest just 1. For QM/QXP, the 4 power
domains are: DSP, DSP_RAM, MU13A, MU13B.
First off, drop MU13A from the count as its already attached
to lsio_mu13. This decreases the count to 3.
Secondly, drop DSP and DSP_RAM from the count for QXP. These
are already attached to the DSP's LPCGs.
Thirdly, a new power domain is required for DSP-SCU communication
(MU2A). With this in mind, the number of required power domains
for QXP is 2 (MU2A, MU13B), while for QM it's 4 (MU13B, DSP,
DSP_RAM, MU2A).
Update the fsl,dsp binding to reflect all of this information.
Since the arm,mhuv2 binding has an example node using the
fsl,imx8qxp-dsp compatible, remove two of the extra PDs to
align with the required power domain count.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the compatibles for Exynos9810 SoC and samsung,starlte board to the
list of boards. Samsung Galaxy S9 (SM-G960F, codenamed starlte)
is a mobile phone, released in 2018.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-6-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add compatible for Samsung Exynos9810 PMU to the schema.
Like on other devices, it contains various registers related
to power management and other vital to SoC functions.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-5-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add the compatible for Samsung Mongoose M3 CPU core to the schema.
Mongoose M3 (codenamed Meerkat) is the big core in Exynos9810 SoC,
designed by Samsung. It implements ARMv8.2-A ISA.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-1-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
MCT has one global timer and 8 CPU local timers. The global timer
can generate 4 interrupts, and each local timer can generate an
interrupt making 12 interrupts in total.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20241023091734.538682-4-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add clock management unit nodes for:
- cmu_top, which provides muxes, divs and gates for other CMUs
- cmu_peris, which provides clocks for GIC and MCT
- cmu_fsys0, which provides clocks for USBDRD30
- cmu_fsys1, which provides clocks for MMC, UFS and PCIE
- cmu_peric0, which provides clocks for UART_DBG, USI00 ~ USI03
- cmu_peric1, which provides clocks for SPI_CAM0/1, UART_BT,
USI04 ~ USI13
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20241023091734.538682-3-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Just like most Samsung Exynos SoCs, Exynos8895 uses almost the same
Multi-Core Timer block with no functional differences.
Add dedicated samsung,exynos8895-mct compatible to the dt-schema for
representing the MCT timer of Exynos8895 SoC.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241023091734.538682-2-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Implements a slightly modified rk3588s-orangepi-5b.dts from the vendor.
Unfortunately the &wireless_bluetooth and &wireless_wlan are not
implemented yet.
Therefore add the sdhci alias to be mmc0 on the rk3588s-orangepi-5b.dts.
How is the Orange Pi 5B unique?
- the Orange Pi 5b uses combphy0_ps for the WiFi.
- the Orange Pi 5B has GPIO0_C5 hooked to BT_WAKE_HOST.
- builtin eMMC storage
- ap6275p Wifi module (like the Orange Pi 5 Plus)
- builtin BlueTooth module
Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
Link: https://lore.kernel.org/r/20241024095038.42079-3-cenk.uluisik@googlemail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This extends the Xunlong Orange Pi 5 device tree binding
with an enum for the Orange Pi 5b, which is implemented
before the device tree.
How does this board differ from the original Orange Pi 5?
- the Orange Pi 5 has a M.2 NVMe M-key PCI 2.0x1
slot (hooked to combphy0_ps) whereas the Orange Pi 5b uses combphy0_ps
for the WiFi.
- The Orange Pi 5 with the M.2 socket has a regulator defined hooked to
"GPIO0_C5" (i.e. PCIE_PWREN_H) whereas the Orange Pi 5B has GPIO0_C5
hooked to BT_WAKE_HOST.
- builtin eMMC storage
- no SPI NOR flash (u-boot, preboot etc. initiates
from within the eMMC
storage)
- ap6275p Wifi module (like the Orange Pi 5 Plus)
- builtin BlueTooth module
Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241024095038.42079-2-cenk.uluisik@googlemail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Unique to the Orange Pi 5 board:
- M.2 NVMe M-Key PCIe 2.0x1 on combphy0_ps
- SPI NOR flash
Co-Developed-by: Jimmy Hon <honyuenkwun@gmail.com>
Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Signed-off-by: Cenk Uluisik <cenk.uluisik@googlemail.com>
Link: https://lore.kernel.org/r/20241024095038.42079-1-cenk.uluisik@googlemail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The 'enable-active-low' property is not a valid, because it is the
default behaviour of the fixed regulator.
Only 'enable-active-high' is valid, and when this property is absent
the fixed regulator will act as active low by default.
Both the rk3588-orange-pi-5 and the Wolfvision pf5 io expander overlay
smuggled those enable-active-low properties in, so remove them to
make dtbscheck happier.
Fixes: 28799a7734a0 ("arm64: dts: rockchip: add wolfvision pf5 io expander board")
Cc: Michael Riesch <michael.riesch@wolfvision.net>
Fixes: b6bc755d806e ("arm64: dts: rockchip: Add Orange Pi 5")
Cc: Muhammed Efe Cetin <efectn@6tel.net>
Reviewed-by: Michael Riesch <michael.riesch@wolfvision.net>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20241008203940.2573684-10-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The jaguar has an hdmi output port, which is connected
to the hdmi0 controller of the rk3588.
Add the necessary plumbing to enable it using the recently merged
hdmi-qp controller.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20241024151403.1748554-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Haikou baseboard has an hdmi output port, which is connected
via the Q7 connector to the hdmi0 controller of the rk3588.
Add the necessary plumbing to enable it using the recently merged
hdmi-qp controller.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20241024151403.1748554-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Tiger SoM routes all relevant HDMI pins to its Q7 connector.
Some from the M0 and some from the M1 set of pins.
Add the necessary pinctrl entry to the hdmi controller for the SoM.
Not all baseboards may use all pins, but even for them it'll serve
documentation purposes.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20241024151403.1748554-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Define the sdr104-specific offsets, preventing the driver from
defaulting to the 1.8V offsets, which cause the system to hang during
the SDR104 mode calibration.
The zeroing of these values was chosen since it restores functionality
and no better suggestions are provided by the Tegra X1 TRM.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The dtschema requires to specify common ancestor which all SDIO chips are
derived from, so add accordingly.
Fixes: a50d5dcd2815 ("arm64: tegra: Wire up WiFi on Jetson TX1 module")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202409030438.8tumAnp1-lkp@intel.com
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Typically any non-removable storage (emmc) is listed before removable
storage (sd-card) options. Also U-Boot will try to override and use
mmc0=sdhci and mmc1=sdmmc0 for all rk356x boards.
Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20241022193537.1117919-6-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The status prop is typically the last prop.
Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20241022193537.1117919-4-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Use the marketing name for model name, this matches the dt-binding.
Also update the website url in copyright.
Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20241022193537.1117919-2-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the necessary DT changes to enable HDMI0 on FriendlyELEC NanoPC-T6.
Tested on LTS variant of the board but this part is the same on both.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20241023080605.623125-1-marcin.juszkiewicz@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The green LED RUN is driven by PWM0_LED that can be controlled by PWM0_M2
Fixes: b6bc755d806e ("arm64: dts: rockchip: Add Orange Pi 5")
Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20241024012726.1730-2-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
