25998 Commits

Author SHA1 Message Date
Russell King
4ba3f7c559 [ARM] mm: allow LH7A40x to use sparsemem
Enable Sparsemem support for LH7A40x SoCs, while still allowing the
existing discontig support for the time being.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 21:42:08 +01:00
Russell King
07a2f737ba [ARM] mm: deprecate discontigmem on ARM
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 21:41:32 +01:00
Russell King
ee93916efe [ARM] mm: switch SA1100 to use sparsemem
Tested on Assabet, and Assabet with Neponset's SDRAM at 3328M phys.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 21:03:21 +01:00
Linus Torvalds
edfd222fc5 Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, vmi: fix broken LDT access
  x86: fix typo in enable_mtrr_cleanup early parameter
2008-10-01 12:26:49 -07:00
David Howells
d6478fad43 MN10300: Fix IRQ handling
Fix the IRQ handling on the MN10300 arch.

This patch makes a number of significant changes:

 (1) It separates the irq_chip definition for edge-triggered interrupts from
     the one for level-triggered interrupts.

     This is necessary because the MN10300 PIC latches the IRQ channel's
     interrupt request bit (GxICR_REQUEST), even after the device has ceased to
     assert its interrupt line and the interrupt channel has been disabled in
     the PIC.  So for level-triggered interrupts we need to clear this bit when
     we re-enable - which is achieved by setting GxICR_DETECT but not
     GxICR_REQUEST when writing to the register.

     Not doing this results in spurious interrupts occurring because calling
     mask_ack() at the start of handle_level_irq() is insufficient - it fails
     to clear the REQUEST latch because the device that caused the interrupt is
     still asserting its interrupt line at this point.

 (2) IRQ disablement [irq_chip::disable_irq()] shouldn't clear the interrupt
     request flag for edge-triggered interrupts lest it lose an interrupt.

 (3) IRQ unmasking [irq_chip::unmask_irq()] also shouldn't clear the interrupt
     request flag for edge-triggered interrupts lest it lose an interrupt.

 (4) The end() operation is now left to the default (no-operation) as
     __do_IRQ() is compiled out.  This may affect misrouted_irq(), but
     according to Thomas Gleixner it's the correct thing to do.

 (5) handle_level_irq() is used for edge-triggered interrupts rather than
     handle_edge_irq() as the MN10300 PIC latches interrupt events even on
     masked IRQ channels, thus rendering IRQ_PENDING unnecessary.  It is
     sufficient to call mask_ack() at the start and unmask() at the end.

 (6) For level-triggered interrupts, ack() is now NULL as it's not used, and
     there is no effective ACK function on the PIC.  mask_ack() is now the
     same as mask() as the latch continues to latch, even when the channel is
     masked.

Further, the patch discards the disable() op implementation as its now the same
as the mask() op implementation, which is used instead.

It also discards the enable() op implementations as they're now the same as
the unmask() op implementations, which are used instead.

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-01 09:40:43 -07:00
Russell King
07f841b7c5 [ARM] mm: enable sparsemem on clps7500 and RiscPC
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 17:24:04 +01:00
Russell King
b7a69ac303 [ARM] mm: finish ARM sparsemem support
... including some comments about the ordering required to bring
sparsemem up.  You have to repeatedly guess, test, reguess, try
again and again to work out what the right ordering is.  Many
hours later...

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 17:24:04 +01:00
Russell King
d2a38ef9c1 [ARM] mm: provide helpers for accessing membanks
Provide helpers for getting physical addresses or pfns from the
meminfo array, and use them.  Move for_each_nodebank() to
asm/setup.h alongside the meminfo structure definition.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 17:22:02 +01:00
Russell King
8ec53663d2 [ARM] Improve non-executable support
Add support for detecting non-executable stack binaries, and adjust
permissions to prevent execution from data and stack areas.  Also,
ensure that READ_IMPLIES_EXEC is enabled for older CPUs where that
is true, and for any executable-stack binary.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:10 +01:00
Russell King
5ec9407dd1 [ARM] Don't include asm/elf.h in asm code
asm code really wants asm/hwcap.h, so include that instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:10 +01:00
Russell King
9b727abdff [ARM] Remove MT_NONSHARED_DEVICE alias
Use MT_DEVICE_NONSHARED instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:07 +01:00
Russell King
db5b716947 [ARM] Remove MT_DEVICE_IXP2000 and associated definitions
As of the previous commit, MT_DEVICE_IXP2000 encodes to the same
PTE bit encoding as MT_DEVICE, so it's now redundant.  Convert
MT_DEVICE_IXP2000 to use MT_DEVICE instead, and remove its aliases.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:06 +01:00
Russell King
40df2d1d85 [ARM] Update Xscale and Xscale3 PTE mappings
Use 'shared device' mappings for devices, and use the standard
bit combinations for Xscale3.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:04 +01:00
Russell King
40d192b63d [ARM] remove 'prot_pte_ext' from memory type table
This member is now redundant; the memory type is encoded in the Linux
PTE bits.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:02 +01:00
Russell King
3f69c0c1af [ARM] Convert ARMv7 to use TEX remapping
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:01 +01:00
Russell King
639b0ae7f5 [ARM] Convert ARMv6 and ARMv7 to use new memory types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:41:00 +01:00
Russell King
9e8b5199a7 [ARM] Convert Xscale and Xscale3 to use new memory types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:40:58 +01:00
Russell King
bb30f36f9b [ARM] Introduce new PTE memory type bits
Provide L_PTE_MT_xxx definitions to describe the memory types that we
use in Linux/ARM.  These definitions are carefully picked such that:

1. their LSBs match what is required for pre-ARMv6 CPUs.
2. they all have a unique encoding, including after modification
   by build_mem_type_table() (the result being that some have more
   than one combination.)

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:40:56 +01:00
Russell King
9cff96e5bf [ARM] Re-jig Linux PTE bits to allow room for 4 memory type bits
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:40:54 +01:00
Russell King
da0916539d [ARM] Convert set_pte_ext implementions to macros
There are actually only four separate implementations of set_pte_ext.
Use assembler macros to insert code for these into the proc-*.S files.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01 16:40:52 +01:00
Russell King
6c5da7aced [ARM] mm: move vmalloc= parsing to arch/arm/mm/mmu.c
There's no point scattering this around the tree, the parsing
of the parameter might as well live beside the code which uses
it.  That also means we can make vmalloc_reserve a static
variable.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 21:34:16 +01:00
Russell King
eca73214c9 [ARM] mm: move validation of membanks to one place
The newly introduced sanity_check_meminfo() function should be
used to collect all validation of the meminfo array, which we
have in bootmem_init().  Move it there.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 21:34:15 +01:00
Zachary Amsden
dc63b52673 x86, vmi: fix broken LDT access
This one took a long time to rear up because LDT usage is not very
common, but the bug is quite serious.  It got introduced along with
another bug, already fixed, by 75b8bb3e56ca09a467fbbe5229bc68627f7445be

After investigating a JRE failure, I found this bug was introduced a long time
ago, and had already managed to survive another bugfix which occurred on the
same line.  The result is a total failure of the JRE due to LDT selectors not
working properly.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Cc: Glauber de Oliveira Costa <gcosta@redhat.com>
Cc: stable@kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30 21:13:18 +02:00
Zachary Amsden
de59985e3a x86: Fix broken LDT access in VMI
After investigating a JRE failure, I found this bug was introduced a
long time ago, and had already managed to survive another bugfix which
occurred on the same line.  The result is a total failure of the JRE due
to LDT selectors not working properly.

This one took a long time to rear up because LDT usage is not very
common, but the bug is quite serious.  It got introduced along with
another bug, already fixed, by 75b8bb3e56ca09a467fbbe5229bc68627f7445be

Signed-off-by: Zachary Amsden <zach@vmware.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Glauber de Oliveira Costa <gcosta@redhat.com>
Cc: <stable@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-09-30 11:16:34 -07:00
Nicolas Pitre
99c6bb390c [ARM] Feroceon: small cleanups to L2 cache code
- Make sure that coprocessor instructions for range ops are contiguous
  and not reordered.

- s/invalidate_and_disable_dcache/flush_and_disable_dcache/

- Don't re-enable I/D caches if they were not enabled initially.

- Change some masks to shifts for better generated code.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Lennert Buytenhek <buytenh@marvell.com>
2008-09-30 13:41:54 -04:00
Linus Torvalds
d3a47e82b6 Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
  [IA64] Put the space for cpu0 per-cpu area into .data section
2008-09-30 09:47:16 -07:00
Nicolas Pitre
da46c79a54 [ARM] 5272/1: remove conditional compilation in show_pte()
The PTRS_PER_PMD != 1 condition can be evaluated with C code and
optimized at compile time.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 16:41:04 +01:00
Nicolas Pitre
dfcc64497c [ARM] 5271/1: get rid of pages_to_mb()
There is no use of this in the whole tree.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 16:40:59 +01:00
Linus Torvalds
95237b80a3 Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc: Fix failure to shutdown with CPU hotplug
  powerpc: Fix PCI in Holly device tree
2008-09-30 08:40:46 -07:00
Catalin Marinas
76ebc6a429 [ARM] 5269/1: ARMv7: Use -march=armv7-a as compiler flag
The current -march=armv7a is not supported by mainline gcc.

Cc: Paul Brook <paul@codesourcery.com>
Cc: Wei Zhong <weizhong@broadcom.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 11:30:54 +01:00
Russell King
7807c6098a [ARM] dma: fix some comments in dma-mapping.h
... to prevent people being mislead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 11:30:53 +01:00
Russell King
309dbbabee [ARM] dma: don't touch cache on dma_*_for_cpu()
As per the dma_unmap_* calls, we don't touch the cache when a DMA
buffer transitions from device to CPU ownership.  Presently, no
problems have been identified with speculative cache prefetching
which in itself is a new feature in later architectures.  We may
have to revisit the DMA API later for these architectures anyway.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 11:01:36 +01:00
J.A. Magallón
3dcd7e269d x86: fix typo in enable_mtrr_cleanup early parameter
Correct typo for 'enable_mtrr_cleanup' early boot param name.

Signed-off-by: J.A. Magallon <jamagallon@ono.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30 10:06:09 +02:00
Johannes Berg
61e9916eba powerpc: Fix failure to shutdown with CPU hotplug
I tracked down the shutdown regression to CPUs not dying
when being shut down during power-off. This turns out to
be due to the system_state being SYSTEM_POWER_OFF, which
this code doesn't take as a valid state for shutting off
CPUs in.

This has never made sense to me, but when I added hotplug
code to implement hibernate I only "made it work" and did
not question the need to check the system_state. Thomas
Gleixner helped me dig, but the only thing we found is
that it was added with the original commit that added CPU
hotplug support.

Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Acked-by: Joel Schopp <jschopp@austin.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-09-30 13:25:06 +10:00
David Gibson
ad611045ce powerpc: Fix PCI in Holly device tree
The PCI bridge on the Holly board is incorrectly represented in the
device tree.  The current device tree node for the PCI bridge sits
under the tsi-bridge node.  That's not obviously wrong, but the PCI
bridge translates some PCI spaces into CPU address ranges which were
not translated by the "ranges" property in tsi-bridge node.

We used to get away with this problem because the PCI bridge discovery
code was also buggy, assuming incorrectly that PCI host bridge nodes
were always directly under the root bus and treating the translated
addresses as raw CPU addresses, rather than parent bus addresses.
This has since been fixed, thus breaking Holly.

This could be fixed by adding extra translations to the tsi-bridge
node, but this patch instead moves the Holly PCI bridge out of the
tsi-bridge node to the root bus.  This makes the tsi-bridge node
represent only the built-in IO devices in the bridge, with a
more-or-less contiguous address range.  This is the same convention
used on Freescale SoC chips, where the "soc" node represents only the
IMMR region, and the PCI and other bus bridges are separate nodes
under the root bus.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2008-09-30 13:25:05 +10:00
Tony Luck
c459ce8b5a [IA64] Put the space for cpu0 per-cpu area into .data section
Initial fix for making sure that we can access percpu variables
in all C code (commit: 10617bbe84628eb18ab5f723d3ba35005adde143)
inadvertantly allocated the memory in the "percpu" section of
the vmlinux ELF executable.  This confused kexec/dump.

Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-09-29 16:39:19 -07:00
Linus Torvalds
bf5cb66447 Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: disable apm on the olpc
2008-09-29 08:39:59 -07:00
Linus Torvalds
0f873d5fb6 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [SSB] Initialise dma_mask for SSB_BUSTYPE_SSB devices
  [MIPS] BCM47xx: Fix build error due to missing PCI functions
  [MIPS] IP27: Switch to dynamic interrupt routing avoding panic on error.
  [MIPS] au1000: Make sure GPIO value is zero or one
2008-09-29 08:31:52 -07:00
Linus Torvalds
df45eddc60 Merge branch 'linux-m32r' of git://www.linux-m32r.org/git/takata/linux-2.6_dev
* 'linux-m32r' of git://www.linux-m32r.org/git/takata/linux-2.6_dev:
  m32r/kernel/: cleanups
  m32r: export __ndelay
  m32r: export empty_zero_page
  m32r: don't offer CONFIG_ISA
  m32r: remove the unused NOHIGHMEM option
2008-09-29 08:30:47 -07:00
Linus Torvalds
929675d58c Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb
* 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb:
  kgdboc,tty: Fix tty polling search to use name correctly
  kgdb, x86_64: fix PS CS SS registers in gdb serial
  kgdb, x86_64: gdb serial has BX and DX reversed
  kgdb, x86, arm, mips, powerpc: ignore user space single stepping
  kgdb: could not write to the last of valid memory with kgdb
2008-09-29 08:30:11 -07:00
Andrew Victor
791ccf2e4d [ARM] 5267/1: [AT91] Name conflict in mach-at91/leds.c
The name of the platform device 'at91_pwm_leds' conflicts with the
function at91_pwm_leds().
So rename the device 'at91_pwm_leds_device' to be more specific.
Similarly rename 'at91_gpio_leds_device' for consistency.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-29 15:46:26 +01:00
Andrew Victor
bf07e4404e [ARM] 5261/1: [AT91] Support for LEDs on Conitec ARM&EVA board
Add support for the LEDs on the Conitec ARM&EVA board.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-29 15:46:03 +01:00
Russell King
0e18b5d7c6 [ARM] dma: add validation of DMA params
Validate the direction argument like x86 does.  In addition,
validate the dma_unmap_* parameters against those passed to
dma_map_* when using the DMA bounce code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-29 13:54:28 +01:00
Russell King
3216a97bb0 [ARM] dma: coding style cleanups
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-29 10:41:02 +01:00
Russell King
125ab12acf [ARM] dma: fix dmabounce dma_sync_xxx() implementations
The dmabounce dma_sync_xxx() implementation have been broken for
quite some time; they all copy data between the DMA buffer and
the CPU visible buffer no irrespective of the change of ownership.
(IOW, a DMA_FROM_DEVICE mapping copies data from the DMA buffer
to the CPU buffer during a call to dma_sync_single_for_device().)

Fix it by getting rid of sync_single(), moving the contents into
the recently created dmabounce_sync_for_xxx() functions and adjusting
appropriately.

This also makes it possible to properly support the DMA range sync
functions.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-29 10:40:22 +01:00
Russell King
8c8a0ec57e [ARM] dma: use new dmabounce_sync_for_xxx() for dma_sync_single_xxx()
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-29 10:40:16 +01:00
Russell King
2638b4dbe7 [ARM] dma: Reduce to one dma_sync_sg_* implementation
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-29 10:40:16 +01:00
Aurelien Jarno
2dc42b47a7 [MIPS] BCM47xx: Fix build error due to missing PCI functions
This patch defines pcibios_map_irq() and pcibios_plat_dev_init() for
the BCM47xx platform.

It fixes the regression introduced by commit
aab547ce0d1493d400b6468c521a0137cd8c1edf.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-09-27 15:45:36 +01:00
Ralf Baechle
f4d15f1c87 [MIPS] IP27: Switch to dynamic interrupt routing avoding panic on error.
pcibios_map_irq is no way of returning an error but on IP27 an interrupt
is possibly not routable when running out of resources.  So do the
interrupt routing at pcibios_enable_device time.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-09-27 15:45:36 +01:00
Bruno Randolf
19506fc518 [MIPS] au1000: Make sure GPIO value is zero or one
David Brownell <david-b@pacbell.net> wrote:
>       The problem is that "value" is zero-or-nonzero.
>       This code wrongly assumes it's zero-or-one.
>       Possible fix:  "((!!value) << gpio)".

Signed-off-by: Bruno Randolf <br1@einfach.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-09-27 15:45:35 +01:00