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1ec2362084
After a recent LLVM change [1] that deduces __cold on functions that
only call cold code (such as __init functions), there is a section
mismatch warning from imx7d_enet_init(), which got moved to
.text.unlikely. as a result of that optimization:
WARNING: modpost: vmlinux: section mismatch in reference: imx7d_enet_init+0x20 (section: .text.unlikely.) -> imx7d_enet_clk_sel (section: .init.text)
Drop the inline keyword (which does not guarantee inlining) and replace
it with __init, as imx7d_enet_init() is only called from __init code,
which clears up the warning.
Link: 6b11573b8c [1]
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
89 lines
1.9 KiB
C
89 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*/
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#include <linux/irqchip.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <linux/regmap.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "common.h"
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static int bcm54220_phy_fixup(struct phy_device *dev)
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{
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/* enable RXC skew select RGMII copper mode */
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phy_write(dev, 0x1e, 0x21);
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phy_write(dev, 0x1f, 0x7ea8);
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phy_write(dev, 0x1e, 0x2f);
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phy_write(dev, 0x1f, 0x71b7);
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return 0;
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}
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#define PHY_ID_BCM54220 0x600d8589
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static void __init imx7d_enet_phy_init(void)
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{
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if (IS_BUILTIN(CONFIG_PHYLIB)) {
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phy_register_fixup_for_uid(PHY_ID_BCM54220, 0xffffffff,
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bcm54220_phy_fixup);
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}
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}
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static void __init imx7d_enet_clk_sel(void)
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{
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struct regmap *gpr;
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr");
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if (!IS_ERR(gpr)) {
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regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0);
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regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0);
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} else {
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pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n");
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}
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}
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static void __init imx7d_enet_init(void)
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{
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imx7d_enet_phy_init();
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imx7d_enet_clk_sel();
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}
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static void __init imx7d_init_machine(void)
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{
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imx_anatop_init();
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imx7d_enet_init();
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}
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static void __init imx7d_init_late(void)
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{
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if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
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platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
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}
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static void __init imx7d_init_irq(void)
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{
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imx_init_revision_from_anatop();
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imx7_src_init();
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irqchip_init();
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}
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static const char *const imx7d_dt_compat[] __initconst = {
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"fsl,imx7d",
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"fsl,imx7s",
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NULL,
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};
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DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
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.smp = smp_ops(imx7_smp_ops),
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.init_irq = imx7d_init_irq,
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.init_machine = imx7d_init_machine,
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.init_late = imx7d_init_late,
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.dt_compat = imx7d_dt_compat,
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MACHINE_END
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