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0fdebc5ec2
Based on the normalized pattern:
this file is licensed under the terms of the gnu general public
license version 2 this program is licensed as is without any warranty
of any kind whether express or implied
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
112 lines
3.2 KiB
C
112 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Symmetric Multi Processing (SMP) support for Marvell EBU Cortex-A9
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* based SOCs (Armada 375/38x).
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*
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* Copyright (C) 2014 Marvell
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*
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/smp.h>
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#include <linux/mbus.h>
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#include <asm/smp_scu.h>
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#include <asm/smp_plat.h>
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#include "common.h"
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#include "pmsu.h"
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extern void mvebu_cortex_a9_secondary_startup(void);
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static int mvebu_cortex_a9_boot_secondary(unsigned int cpu,
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struct task_struct *idle)
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{
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int ret, hw_cpu;
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pr_info("Booting CPU %d\n", cpu);
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/*
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* Write the address of secondary startup into the system-wide
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* flags register. The boot monitor waits until it receives a
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* soft interrupt, and then the secondary CPU branches to this
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* address.
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*/
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hw_cpu = cpu_logical_map(cpu);
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if (of_machine_is_compatible("marvell,armada375"))
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mvebu_system_controller_set_cpu_boot_addr(mvebu_cortex_a9_secondary_startup);
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else
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mvebu_pmsu_set_cpu_boot_addr(hw_cpu, mvebu_cortex_a9_secondary_startup);
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smp_wmb();
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/*
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* Doing this before deasserting the CPUs is needed to wake up CPUs
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* in the offline state after using CPU hotplug.
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*/
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arch_send_wakeup_ipi_mask(cpumask_of(cpu));
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ret = mvebu_cpu_reset_deassert(hw_cpu);
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if (ret) {
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pr_err("Could not start the secondary CPU: %d\n", ret);
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return ret;
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}
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return 0;
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}
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/*
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* When a CPU is brought back online, either through CPU hotplug, or
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* because of the boot of a kexec'ed kernel, the PMSU configuration
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* for this CPU might be in the deep idle state, preventing this CPU
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* from receiving interrupts. Here, we therefore take out the current
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* CPU from this state, which was entered by armada_38x_cpu_die()
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* below.
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*/
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static void armada_38x_secondary_init(unsigned int cpu)
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{
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mvebu_v7_pmsu_idle_exit();
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static void armada_38x_cpu_die(unsigned int cpu)
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{
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/*
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* CPU hotplug is implemented by putting offline CPUs into the
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* deep idle sleep state.
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*/
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armada_38x_do_cpu_suspend(true);
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}
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/*
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* We need a dummy function, so that platform_can_cpu_hotplug() knows
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* we support CPU hotplug. However, the function does not need to do
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* anything, because CPUs going offline can enter the deep idle state
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* by themselves, without any help from a still alive CPU.
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*/
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static int armada_38x_cpu_kill(unsigned int cpu)
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{
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return 1;
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}
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#endif
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static const struct smp_operations mvebu_cortex_a9_smp_ops __initconst = {
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.smp_boot_secondary = mvebu_cortex_a9_boot_secondary,
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};
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static const struct smp_operations armada_38x_smp_ops __initconst = {
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.smp_boot_secondary = mvebu_cortex_a9_boot_secondary,
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.smp_secondary_init = armada_38x_secondary_init,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = armada_38x_cpu_die,
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.cpu_kill = armada_38x_cpu_kill,
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#endif
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};
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CPU_METHOD_OF_DECLARE(mvebu_armada_375_smp, "marvell,armada-375-smp",
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&mvebu_cortex_a9_smp_ops);
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CPU_METHOD_OF_DECLARE(mvebu_armada_380_smp, "marvell,armada-380-smp",
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&armada_38x_smp_ops);
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CPU_METHOD_OF_DECLARE(mvebu_armada_390_smp, "marvell,armada-390-smp",
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&armada_38x_smp_ops);
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