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e6acc4062c
None of the headers are included from outside of the mach-pxa directory, so move them all in there. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
114 lines
2.5 KiB
C
114 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/mach-pxa/generic.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* Code common to all PXA machines.
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*
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* Since this file should be linked before any other machine specific file,
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* the __initcall() here will be executed first. This serves as default
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* initialization stuff for PXA machines which can be overridden later if
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* need be.
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*/
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/soc/pxa/cpu.h>
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#include <linux/soc/pxa/smemc.h>
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#include <linux/clk/pxa.h>
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#include <asm/mach/map.h>
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#include <asm/mach-types.h>
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#include "addr-map.h"
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#include "irqs.h"
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#include "reset.h"
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#include "smemc.h"
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#include "pxa3xx-regs.h"
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#include "generic.h"
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#include <clocksource/pxa.h>
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void clear_reset_status(unsigned int mask)
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{
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if (cpu_is_pxa2xx())
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pxa2xx_clear_reset_status(mask);
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else {
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/* RESET_STATUS_* has a 1:1 mapping with ARSR */
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ARSR = mask;
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}
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}
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/*
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* For non device-tree builds, keep legacy timer init
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*/
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void __init pxa_timer_init(void)
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{
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if (cpu_is_pxa25x())
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pxa25x_clocks_init(io_p2v(0x41300000));
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if (cpu_is_pxa27x())
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pxa27x_clocks_init(io_p2v(0x41300000));
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if (cpu_is_pxa3xx())
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pxa3xx_clocks_init(io_p2v(0x41340000), io_p2v(0x41350000));
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pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000));
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}
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void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio)
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{
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__raw_writel(mcmem, MCMEM(sock));
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__raw_writel(mcatt, MCATT(sock));
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__raw_writel(mcio, MCIO(sock));
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}
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EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing);
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void pxa_smemc_set_pcmcia_socket(int nr)
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{
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switch (nr) {
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case 0:
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__raw_writel(0, MECR);
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break;
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case 1:
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/*
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* We have at least one socket, so set MECR:CIT
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* (Card Is There)
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*/
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__raw_writel(MECR_CIT, MECR);
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break;
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case 2:
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/* Set CIT and MECR:NOS (Number Of Sockets) */
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__raw_writel(MECR_CIT | MECR_NOS, MECR);
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break;
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}
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}
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EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket);
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void __iomem *pxa_smemc_get_mdrefr(void)
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{
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return MDREFR;
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}
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/*
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* Intel PXA2xx internal register mapping.
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*
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* Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
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* and cache flush area.
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*/
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static struct map_desc common_io_desc[] __initdata = {
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{ /* Devs */
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.virtual = (unsigned long)PERIPH_VIRT,
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.pfn = __phys_to_pfn(PERIPH_PHYS),
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.length = PERIPH_SIZE,
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.type = MT_DEVICE
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}
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};
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void __init pxa_map_io(void)
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{
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debug_ll_io_init();
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iotable_init(ARRAY_AND_SIZE(common_io_desc));
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}
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