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e6acc4062c
None of the headers are included from outside of the mach-pxa directory, so move them all in there. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
53 lines
1.5 KiB
C
53 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*/
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#ifndef __ASM_MACH_PXA_REGS_H
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#define __ASM_MACH_PXA_REGS_H
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/*
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* Workarounds for at least 2 errata so far require this.
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* The mapping is set in mach-pxa/generic.c.
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*/
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#define UNCACHED_PHYS_0 0xfe000000
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#define UNCACHED_PHYS_0_SIZE 0x00100000
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/*
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* Intel PXA2xx internal register mapping:
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*
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* 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
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* 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
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* 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
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* 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
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* 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
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* 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
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* 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
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*
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* Note that not all PXA2xx chips implement all those addresses, and the
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* kernel only maps the minimum needed range of this mapping.
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*/
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#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
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#define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
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#ifndef __ASSEMBLY__
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# define __REG(x) (*((volatile u32 __iomem *)io_p2v(x)))
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/* With indexed regs we don't want to feed the index through io_p2v()
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especially if it is a variable, otherwise horrible code will result. */
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# define __REG2(x,y) \
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(*(volatile u32 __iomem*)((u32)&__REG(x) + (y)))
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# define __PREG(x) (io_v2p((u32)&(x)))
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#else
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# define __REG(x) io_p2v(x)
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# define __PREG(x) io_v2p(x)
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#endif
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#endif
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