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ea1cca0268
Add clock definitions for the main clock and reset controllers of MT6735 (apmixedsys, topckgen, infracfg and pericfg). Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20241017071708.38663-2-y.oudjana@protonmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
38 lines
979 B
C
38 lines
979 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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#ifndef _DT_BINDINGS_CLK_MT6735_PERICFG_H
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#define _DT_BINDINGS_CLK_MT6735_PERICFG_H
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#define CLK_PERI_DISP_PWM 0
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#define CLK_PERI_THERM 1
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#define CLK_PERI_PWM1 2
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#define CLK_PERI_PWM2 3
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#define CLK_PERI_PWM3 4
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#define CLK_PERI_PWM4 5
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#define CLK_PERI_PWM5 6
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#define CLK_PERI_PWM6 7
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#define CLK_PERI_PWM7 8
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#define CLK_PERI_PWM 9
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#define CLK_PERI_USB0 10
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#define CLK_PERI_IRDA 11
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#define CLK_PERI_APDMA 12
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#define CLK_PERI_MSDC30_0 13
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#define CLK_PERI_MSDC30_1 14
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#define CLK_PERI_MSDC30_2 15
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#define CLK_PERI_MSDC30_3 16
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#define CLK_PERI_UART0 17
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#define CLK_PERI_UART1 18
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#define CLK_PERI_UART2 19
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#define CLK_PERI_UART3 20
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#define CLK_PERI_UART4 21
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#define CLK_PERI_BTIF 22
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#define CLK_PERI_I2C0 23
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#define CLK_PERI_I2C1 24
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#define CLK_PERI_I2C2 25
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#define CLK_PERI_I2C3 26
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#define CLK_PERI_AUXADC 27
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#define CLK_PERI_SPI0 28
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#define CLK_PERI_IRTX 29
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#endif
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