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80de9d9dfb
Add bindings documentation for the X1E80100 TCSR Clock Controller. Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-4-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
24 lines
678 B
C
24 lines
678 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2023, Linaro Limited
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H
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#define _DT_BINDINGS_CLK_QCOM_X1E80100_TCSR_CC_H
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/* TCSR CC clocks */
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#define TCSR_PCIE_2L_4_CLKREF_EN 0
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#define TCSR_PCIE_2L_5_CLKREF_EN 1
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#define TCSR_PCIE_8L_CLKREF_EN 2
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#define TCSR_USB3_MP0_CLKREF_EN 3
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#define TCSR_USB3_MP1_CLKREF_EN 4
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#define TCSR_USB2_1_CLKREF_EN 5
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#define TCSR_UFS_PHY_CLKREF_EN 6
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#define TCSR_USB4_1_CLKREF_EN 7
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#define TCSR_USB4_2_CLKREF_EN 8
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#define TCSR_USB2_2_CLKREF_EN 9
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#define TCSR_PCIE_4L_CLKREF_EN 10
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#define TCSR_EDP_CLKREF_EN 11
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#endif
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