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a500427c84
Add interconnect-cells to clock provider so that it can be used as icc provider. Add master/slave ids for Qualcomm IPQ5332 Network-On-Chip interfaces. This will be used by the gcc-ipq5332 driver for providing interconnect services using the icc-clk framework. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240730054817.1915652-2-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
47 lines
1.4 KiB
C
47 lines
1.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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#ifndef INTERCONNECT_QCOM_IPQ5332_H
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#define INTERCONNECT_QCOM_IPQ5332_H
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#define MASTER_SNOC_PCIE3_1_M 0
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#define SLAVE_SNOC_PCIE3_1_M 1
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#define MASTER_ANOC_PCIE3_1_S 2
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#define SLAVE_ANOC_PCIE3_1_S 3
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#define MASTER_SNOC_PCIE3_2_M 4
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#define SLAVE_SNOC_PCIE3_2_M 5
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#define MASTER_ANOC_PCIE3_2_S 6
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#define SLAVE_ANOC_PCIE3_2_S 7
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#define MASTER_SNOC_USB 8
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#define SLAVE_SNOC_USB 9
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#define MASTER_NSSNOC_NSSCC 10
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#define SLAVE_NSSNOC_NSSCC 11
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#define MASTER_NSSNOC_SNOC_0 12
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#define SLAVE_NSSNOC_SNOC_0 13
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#define MASTER_NSSNOC_SNOC_1 14
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#define SLAVE_NSSNOC_SNOC_1 15
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#define MASTER_NSSNOC_ATB 16
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#define SLAVE_NSSNOC_ATB 17
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#define MASTER_NSSNOC_PCNOC_1 18
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#define SLAVE_NSSNOC_PCNOC_1 19
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#define MASTER_NSSNOC_QOSGEN_REF 20
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#define SLAVE_NSSNOC_QOSGEN_REF 21
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#define MASTER_NSSNOC_TIMEOUT_REF 22
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#define SLAVE_NSSNOC_TIMEOUT_REF 23
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#define MASTER_NSSNOC_XO_DCD 24
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#define SLAVE_NSSNOC_XO_DCD 25
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#define MASTER_NSSNOC_PPE 0
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#define SLAVE_NSSNOC_PPE 1
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#define MASTER_NSSNOC_PPE_CFG 2
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#define SLAVE_NSSNOC_PPE_CFG 3
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#define MASTER_NSSNOC_NSS_CSR 4
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#define SLAVE_NSSNOC_NSS_CSR 5
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#define MASTER_NSSNOC_CE_APB 6
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#define SLAVE_NSSNOC_CE_APB 7
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#define MASTER_NSSNOC_CE_AXI 8
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#define SLAVE_NSSNOC_CE_AXI 9
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#define MASTER_CNOC_AHB 0
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#define SLAVE_CNOC_AHB 1
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#endif /* INTERCONNECT_QCOM_IPQ5332_H */
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