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54f1618b95
Add devicetree binding document and related header file for Amlogic T7 secure power domains. Signed-off-by: xianwei.zhao <xianwei.zhao@amlogic.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Lucas Tanure <tanure@linux.com> Link: https://lore.kernel.org/r/20230911025223.3433776-5-xianwei.zhao@amlogic.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
64 lines
1.8 KiB
C
64 lines
1.8 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/*
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* Copyright (c) 2023 Amlogic, Inc.
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* Author: Hongyu Chen <hongyu.chen1@amlogic.com>
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*/
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#ifndef _DT_BINDINGS_AMLOGIC_T7_POWER_H
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#define _DT_BINDINGS_AMLOGIC_T7_POWER_H
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#define PWRC_T7_DSPA_ID 0
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#define PWRC_T7_DSPB_ID 1
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#define PWRC_T7_DOS_HCODEC_ID 2
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#define PWRC_T7_DOS_HEVC_ID 3
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#define PWRC_T7_DOS_VDEC_ID 4
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#define PWRC_T7_DOS_WAVE_ID 5
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#define PWRC_T7_VPU_HDMI_ID 6
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#define PWRC_T7_USB_COMB_ID 7
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#define PWRC_T7_PCIE_ID 8
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#define PWRC_T7_GE2D_ID 9
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#define PWRC_T7_SRAMA_ID 10
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#define PWRC_T7_SRAMB_ID 11
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#define PWRC_T7_HDMIRX_ID 12
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#define PWRC_T7_VI_CLK1_ID 13
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#define PWRC_T7_VI_CLK2_ID 14
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#define PWRC_T7_ETH_ID 15
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#define PWRC_T7_ISP_ID 16
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#define PWRC_T7_MIPI_ISP_ID 17
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#define PWRC_T7_GDC_ID 18
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#define PWRC_T7_CVE_ID 18
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#define PWRC_T7_DEWARP_ID 19
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#define PWRC_T7_SDIO_A_ID 20
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#define PWRC_T7_SDIO_B_ID 21
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#define PWRC_T7_EMMC_ID 22
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#define PWRC_T7_MALI_SC0_ID 23
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#define PWRC_T7_MALI_SC1_ID 24
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#define PWRC_T7_MALI_SC2_ID 25
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#define PWRC_T7_MALI_SC3_ID 26
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#define PWRC_T7_MALI_TOP_ID 27
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#define PWRC_T7_NNA_CORE0_ID 28
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#define PWRC_T7_NNA_CORE1_ID 29
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#define PWRC_T7_NNA_CORE2_ID 30
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#define PWRC_T7_NNA_CORE3_ID 31
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#define PWRC_T7_NNA_TOP_ID 32
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#define PWRC_T7_DDR0_ID 33
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#define PWRC_T7_DDR1_ID 34
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#define PWRC_T7_DMC0_ID 35
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#define PWRC_T7_DMC1_ID 36
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#define PWRC_T7_NOC_ID 37
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#define PWRC_T7_NIC2_ID 38
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#define PWRC_T7_NIC3_ID 39
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#define PWRC_T7_CCI_ID 40
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#define PWRC_T7_MIPI_DSI0_ID 41
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#define PWRC_T7_SPICC0_ID 42
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#define PWRC_T7_SPICC1_ID 43
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#define PWRC_T7_SPICC2_ID 44
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#define PWRC_T7_SPICC3_ID 45
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#define PWRC_T7_SPICC4_ID 46
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#define PWRC_T7_SPICC5_ID 47
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#define PWRC_T7_EDP0_ID 48
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#define PWRC_T7_EDP1_ID 49
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#define PWRC_T7_MIPI_DSI1_ID 50
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#define PWRC_T7_AUDIO_ID 51
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#endif
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