mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2024-12-29 09:13:38 +00:00
2aae5eaa94
SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
19 lines
545 B
C
19 lines
545 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
|
/*
|
|
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
|
|
* Copyright (c) 2023, Linaro Limited
|
|
*/
|
|
|
|
#ifndef _DT_BINDINGS_RESET_QCOM_VIDEO_CC_SM8350_H
|
|
#define _DT_BINDINGS_RESET_QCOM_VIDEO_CC_SM8350_H
|
|
|
|
#define VIDEO_CC_CVP_INTERFACE_BCR 0
|
|
#define VIDEO_CC_CVP_MVS0_BCR 1
|
|
#define VIDEO_CC_MVS0C_CLK_ARES 2
|
|
#define VIDEO_CC_CVP_MVS0C_BCR 3
|
|
#define VIDEO_CC_CVP_MVS1_BCR 4
|
|
#define VIDEO_CC_MVS1C_CLK_ARES 5
|
|
#define VIDEO_CC_CVP_MVS1C_BCR 6
|
|
|
|
#endif
|