Russ Anderson
1f3b6045f7
[IA64] Disable/re-enable CPE interrupts on Altix
...
When the CPE handler encounters too many CPEs (such as a solid single
bit memory error), it sets up a polling timer and disables the CPE
interrupt (to avoid excessive overhead logging the stream of single
bit errors). disable_irq_nosync() calls chip->disable() to provide
a chipset specifiec interface for disabling the interrupt. This patch
adds the Altix specific support to disable and re-enable the CPE interrupt.
Signed-off-by: Russ Anderson (rja@sgi.com )
Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-11-06 15:40:31 -08:00
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