Sebastian Andrzej Siewior 35faa55cff spi/fsl-espi: make the clock computation easier to read
The -1 +1 thingy should probably do what DIV_ROUND_UP does. The 4 is 2
the  "platform_clock => sysclock" and 2 from the computation part. The 64
is the same 4 times 16.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2012-03-15 15:14:13 -06:00
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