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6f14293257
While most MIPS64 CPUs use 32-bit values for their VP Local Reset Exception Base registers, some I6500 CPUs can utilize a 64-bit value, allowing addressing up to 47 bits of physical memory. For the EyeQ6H CPU, where physical memory addresses exceed the 4GB limit, utilizing this feature is mandatory to enable SMP support. Unfortunately, there is no way to detect this capability based solely on the ID of the CPU. According to Imagination, which designed the CPU, the only reliable method is to fill the reset base field with 0xFF and then read back its value. If the upper part of the read-back value is zero, it indicates that the address space is limited to 32 bits. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.