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47bad234ee
Add device tree bindings for the graphics clock controller on Qualcomm SM4450 platform. Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240611133752.2192401-7-quic_ajipan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM4450_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM4450_H
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/* GPU_CC clocks */
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#define GPU_CC_AHB_CLK 0
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#define GPU_CC_CB_CLK 1
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#define GPU_CC_CRC_AHB_CLK 2
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#define GPU_CC_CX_FF_CLK 3
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#define GPU_CC_CX_GFX3D_CLK 4
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#define GPU_CC_CX_GFX3D_SLV_CLK 5
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#define GPU_CC_CX_GMU_CLK 6
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#define GPU_CC_CX_SNOC_DVM_CLK 7
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#define GPU_CC_CXO_AON_CLK 8
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#define GPU_CC_CXO_CLK 9
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#define GPU_CC_DEMET_CLK 10
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#define GPU_CC_DEMET_DIV_CLK_SRC 11
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#define GPU_CC_FF_CLK_SRC 12
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#define GPU_CC_FREQ_MEASURE_CLK 13
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#define GPU_CC_GMU_CLK_SRC 14
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#define GPU_CC_GX_CXO_CLK 15
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#define GPU_CC_GX_FF_CLK 16
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#define GPU_CC_GX_GFX3D_CLK 17
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#define GPU_CC_GX_GFX3D_CLK_SRC 18
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#define GPU_CC_GX_GFX3D_RDVM_CLK 19
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#define GPU_CC_GX_GMU_CLK 20
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#define GPU_CC_GX_VSENSE_CLK 21
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#define GPU_CC_HUB_AHB_DIV_CLK_SRC 22
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#define GPU_CC_HUB_AON_CLK 23
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#define GPU_CC_HUB_CLK_SRC 24
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#define GPU_CC_HUB_CX_INT_CLK 25
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#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 26
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#define GPU_CC_MEMNOC_GFX_CLK 27
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#define GPU_CC_MND1X_0_GFX3D_CLK 28
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#define GPU_CC_PLL0 29
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#define GPU_CC_PLL1 30
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#define GPU_CC_SLEEP_CLK 31
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#define GPU_CC_XO_CLK_SRC 32
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#define GPU_CC_XO_DIV_CLK_SRC 33
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/* GPU_CC power domains */
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#define GPU_CC_CX_GDSC 0
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#define GPU_CC_GX_GDSC 1
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/* GPU_CC resets */
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#define GPU_CC_ACD_BCR 0
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#define GPU_CC_CB_BCR 1
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#define GPU_CC_CX_BCR 2
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#define GPU_CC_FAST_HUB_BCR 3
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#define GPU_CC_FF_BCR 4
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#define GPU_CC_GFX3D_AON_BCR 5
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#define GPU_CC_GMU_BCR 6
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#define GPU_CC_GX_BCR 7
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#define GPU_CC_XO_BCR 8
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#define GPU_CC_GX_ACD_IROOT_BCR 9
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#define GPU_CC_RBCPR_BCR 10
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#endif
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