Nava kishore Manne 01c54e6289 fpga: versal-fpga: Add versal fpga manager driver ...

Add support for Xilinx Versal FPGA manager.

PDI source type can be DDR, OCM, QSPI flash etc..
But driver allocates memory always from DDR, Since driver supports only
DDR source type.

Reviewed-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Link: https://lore.kernel.org/r/20210626155248.5004-6-nava.manne@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2021-07-21 13:14:09 +02:00

..

altera-cvp.c

fpga: altera-cvp: Add Stratix10 (V2) Support

2019-08-24 11:38:29 -07:00

altera-fpga2sdram.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

altera-freeze-bridge.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

altera-hps2fpga.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

altera-pr-ip-core-plat.c

fpga: fpga-mgr: altera-pr-ip: Simplify registration

2020-12-01 18:49:32 +01:00

altera-pr-ip-core.c

fpga: altera-pr-ip: Remove function alt_pr_unregister

2021-06-15 09:27:35 +02:00

altera-ps-spi.c

fpga: fpga-mgr: altera-ps-spi: Simplify registration

2020-12-01 18:49:32 +01:00

dfl-afu-dma-region.c

fpga: dfl: afu: convert get_user_pages() --> pin_user_pages()

2020-06-18 18:12:06 -07:00

dfl-afu-error.c

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-afu-main.c

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-afu-region.c

fpga: dfl: afu: add afu sub feature support

2018-07-15 13:55:47 +02:00

dfl-afu.h

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-fme-br.c

fpga: bridge: add devm_fpga_bridge_create

2018-10-16 11:13:50 +02:00

dfl-fme-error.c

fpga: dfl: fme: add interrupt support for global error reporting

2020-07-06 21:35:42 -07:00

dfl-fme-main.c

fpga: dfl: fme: add interrupt support for global error reporting

2020-07-06 21:35:42 -07:00

dfl-fme-mgr.c

fpga: fpga-mgr: dfl-fme-mgr: Simplify registration

2020-12-01 18:49:32 +01:00

dfl-fme-perf.c

fpga: dfl: fme: Constify static attribute_group structs

2021-01-10 10:57:14 -08:00

dfl-fme-pr.c

drivers/fpga/dfl-fme-pr.c: get rid of pointless access_ok()

2020-05-29 11:04:56 -04:00

dfl-fme-pr.h

fpga: dfl: fme: add partial reconfiguration sub feature support

2018-07-15 13:55:46 +02:00

dfl-fme-region.c

fpga: dfl-fme-region: Use platform_get_drvdata()

2018-11-26 20:47:10 +01:00

dfl-fme.h

fpga: dfl: fme: add performance reporting support

2020-04-28 15:49:28 +02:00

dfl-n3000-nios.c

fpga: dfl: add support for N3000 Nios private feature

2021-01-07 15:21:27 +01:00

dfl-pci.c

fpga: dfl: pci: add DID for D5005 PAC cards

2021-04-05 17:46:56 -07:00

dfl.c

fpga: dfl: move dfl bus related APIs to include/linux/dfl.h

2021-01-07 15:21:27 +01:00

dfl.h

fpga: dfl: move dfl bus related APIs to include/linux/dfl.h

2021-01-07 15:21:27 +01:00

fpga-bridge.c

fpga: bridge: Rename dev to parent for parent device

2021-06-15 09:29:45 +02:00

fpga-mgr.c

fpga: mgr: Rename dev to parent for parent device

2021-06-15 09:29:35 +02:00

fpga-region.c

fpga: region: Rename dev to parent for parent device

2021-06-15 09:29:55 +02:00

ice40-spi.c

fpga: fpga-mgr: ice40-spi: Simplify registration

2020-12-01 18:49:32 +01:00

Kconfig

fpga: versal-fpga: Add versal fpga manager driver

2021-07-21 13:14:09 +02:00

machxo2-spi.c

fpga: machxo2-spi: Address warning about unused variable

2021-06-24 15:45:11 +02:00

Makefile

fpga: versal-fpga: Add versal fpga manager driver

2021-07-21 13:14:09 +02:00

of-fpga-region.c

fpga: of-fpga-region: change FPGA indirect article to an

2021-06-09 14:51:25 +02:00

socfpga-a10.c

fpga: mgr: add devm_fpga_mgr_create

2018-10-16 11:13:50 +02:00

socfpga.c

fpga: fpga-mgr: socfpga: Simplify registration

2020-12-01 18:49:32 +01:00

stratix10-soc.c

fpga: stratix10-soc: Add missing fpga_mgr_free() call

2021-06-15 09:28:15 +02:00

ts73xx-fpga.c

fpga: fpga-mgr: ts73xx: Simplify registration

2020-12-01 18:49:32 +01:00

versal-fpga.c

fpga: versal-fpga: Add versal fpga manager driver

2021-07-21 13:14:09 +02:00

xilinx-pr-decoupler.c

fpga: Add support for Xilinx DFX AXI Shutdown manager

2021-03-06 07:54:40 -08:00

xilinx-spi.c

fpga: fpga-mgr: xilinx-spi: fix error messages on -EPROBE_DEFER

2021-03-06 07:39:17 -08:00

zynq-fpga.c

fpga: zynq: Remove clk_get error message for probe defer

2020-03-30 20:45:21 -07:00

zynqmp-fpga.c

fpga: fpga-mgr: zynqmp: Simplify registration

2020-12-01 18:49:32 +01:00