Viresh Kumar b0c3130d69 dw_dmac: Pass Channel Allocation Order from platform_data ...

In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better
channel first. This patch introduces concept of channel allocation order in
dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel
allocation will follow, else channels will be allocated in descending order.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

2011-03-07 01:12:28 +05:30

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ioat

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ipu

dma: ipu_idmac: do not lose valid received data in the irq handler

2011-02-14 02:28:16 -08:00

ppc4xx

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amba-pl08x.c

DMA: PL08x: fix channel pausing to timeout rather than lockup

2011-01-30 22:03:47 -08:00

at_hdmac_regs.h

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at_hdmac.c

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coh901318_lli.c

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coh901318_lli.h

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coh901318.c

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dmaengine.c

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dmatest.c

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dw_dmac_regs.h

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dw_dmac.c

dw_dmac: Pass Channel Allocation Order from platform_data

2011-03-07 01:12:28 +05:30

fsldma.c

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fsldma.h

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imx-dma.c

dmaengine i.MX dma: initialize dma capabilities outside channel loop

2011-01-31 12:36:23 +01:00

imx-sdma.c

Merge branch 'imx' into dmaengine-fixes

2011-02-14 02:40:46 -08:00

intel_mid_dma_regs.h

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intel_mid_dma.c

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iop-adma.c

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iovlock.c

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Kconfig

dw_dmac: Remove compilation dependency from AVR32 and put on HAVE_CLK

2011-03-07 01:12:27 +05:30

Makefile

dmaengine: mxs-dma: add dma support for i.MX23/28

2011-03-02 07:06:27 +05:30

mpc512x_dma.c

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mv_xor.c

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mv_xor.h

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mxs-dma.c

dmaengine: mxs-dma: add dma support for i.MX23/28

2011-03-02 07:06:27 +05:30

pch_dma.c

pch_dma: set the number of array correctly

2011-02-26 20:18:33 +05:30

pl330.c

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shdma.c

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shdma.h

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ste_dma40_ll.c

dma40: cyclic xfer support

2011-01-30 22:27:21 -08:00

ste_dma40_ll.h

dma40: cyclic xfer support

2011-01-30 22:27:21 -08:00

ste_dma40.c

dma40: cyclic xfer support

2011-01-30 22:27:21 -08:00

timb_dma.c

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txx9dmac.c

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txx9dmac.h

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