Dmitry Osipenko e71f4d3858 clk: tegra: divider: Mark Memory Controller clock as read-only
The Memory Controller (MC) clock rate can't be simply changed and nothing
in kernel need to change the rate, hence let's make the clock read-only.
This id also needed for the EMC driver because timing configuration may
require the MC clock diver to be disabled, that is handled by the EMC
clock / EMC driver integration and CLK framework shall not touch the
MC divider configuration on the EMC clock rate change.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 13:54:23 -07:00
..
2017-11-01 23:25:43 -07:00
2018-11-06 09:41:57 -08:00
2018-03-16 15:53:30 -07:00
2018-12-10 14:43:20 -08:00
2018-12-11 09:57:47 -08:00
2018-12-11 09:57:47 -08:00
2018-12-11 09:57:48 -08:00
2018-07-06 13:44:06 -07:00
2018-12-11 09:57:48 -08:00
2016-10-23 10:18:45 -07:00
2017-11-01 23:25:51 -07:00