Jeffy Chen ea03835fb8 clk: rockchip: allow more than 2 parents for cpuclk ...

RK3228's armclk has 3 parents, so allow cpuclk to have
more than 2 parents.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

2015-12-09 22:30:42 +01:00

..

clk-cpu.c

clk: rockchip: allow more than 2 parents for cpuclk

2015-12-09 22:30:42 +01:00

clk-inverter.c

clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)

2015-08-24 16:49:12 -07:00

clk-mmc-phase.c

The majority of the changes are driver updates and new device

2015-11-05 12:59:36 -08:00

clk-pll.c

clk: rockchip: add new pll-type for rk3036 and similar socs

2015-11-23 21:55:07 +01:00

clk-rk3036.c

clk: rockchip: add clock controller for rk3036

2015-11-23 21:59:19 +01:00

clk-rk3188.c

clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188

2015-09-10 13:55:30 -07:00

clk-rk3288.c

clk: rockchip: switch PLLs to slow mode before reboot for rk3288

2015-12-01 18:33:43 +01:00

clk-rk3368.c

clk: rockchip: fix rk3368 cpuclk divider offsets

2015-12-03 16:20:02 +01:00

clk-rockchip.c

clk: rockchip: fix function type for CLK_OF_DECLARE

2014-05-20 14:25:22 -05:00

clk.c

clk: rockchip: save width in struct clk_fractional_divider

2015-10-02 11:29:47 -07:00

clk.h

clk: rockchip: add clock controller for rk3036

2015-11-23 21:59:19 +01:00

Makefile

clk: rockchip: add clock controller for rk3036

2015-11-23 21:59:19 +01:00

softrst.c

clk: rockchip: add reset controller

2014-07-13 12:17:07 -07:00